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MAX825YEXK 查看數據表(PDF) - Maxim Integrated

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MAX825YEXK Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
5-Pin Microprocessor Supervisory Circuits With
Watchdog Timer and Manual Reset
PIN
MAX823 MAX824 MAX825
1
1
1
2
2
2
3
4
3
3
4
4
5
5
5
NAME
RESET
GND
MR
RESET
WDI
VCC
Pin Description
FUNCTION
Active-Low Reset Output. Pulses low for 200ms when triggered, and remains
low whenever VCC is below the reset threshold or when MR is a logic low. It
remains low for 200ms after one of the following occurs: VCC rises above the
reset threshold, the watchdog triggers a reset, or MR goes low to high.
Ground
Manual Reset Input. A logic low on MR asserts reset. Reset remains asserted as
long as MR is held low and for 200ms after MR returns high. The active-low input
has an internal 52kpullup resistor. It can be driven from a CMOS logic line or
shorted to ground with a switch. Leave open or connect to VCC if unused.
Active-High Reset Output. Inverse of RESET.
Watchdog Input. If WDI remains either high or low for longer than the watch-
dog timeout period, the internal watchdog timer runs out and a reset is trig-
gered. The internal watchdog timer clears whenever reset is asserted, or
whenever WDI sees a rising or falling edge. If WDI is left unconnected or is
connected to a three-stated buffer output, the watchdog feature is disabled.
Supply Voltage
VCC
VCC
MAX823
MAX824
MAX825
1.25V
RESET
GENERATOR
RESET
RESET
(MAX824/MAX825
ONLY)
MR
(MAX823/MAX825
ONLY)
WDI
(MAX823/MAX824
ONLY)
WATCHDOG
TRANSITION
DETECTOR
WATCHDOG
TIMER
GND
Figure 1. Functional Diagram
6 _______________________________________________________________________________________

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