FDC645 查看數據表（PDF） - Fairchild Semiconductor
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FDC645 Datasheet PDF : 5 Pages
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Typical Characteristics
10
ID = 5.5A
8
6
VDS = 5V
10V
15
V
4
2
0
0
5
10
15
20
25
30
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
100
RDS(ON) LIMIT
10
1
VGS = 4.5V
0.1
SINGLE PULSE
RθJA = 156oC/W
TA = 25oC
100µs
1ms
10ms
100ms
1s
10s
DC
0.01
0.1
1
10
100
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
2400
2000
1600
1200
800
400
0
0
CISS
f = 1MHz
VGS = 0 V
COSS
CRSS
5
10
15
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance Characteristics.
5
SINGLE PULSE
4
RθJA = 156°C/W
TA = 25°C
3
2
1
0
0.1
1
10
100
t1, TIME (sec)
1000
Figure 10. Single Pulse Maximum
Power Dissipation.
1
0.1
0.01
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
t1, TIME (sec)
RθJA(t) = r(t) + RθJA
RθJA = 156°C/W
P(pk)
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDC645N Rev C(W)
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