STLC5465 查看數據表（PDF） - STMicroelectronics
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STLC5465 Datasheet PDF : 101 Pages
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STLC5465B
I - PIN INFORMATION (continued)
I.2 - Pin Description
Pin N° Symbol
Type
Fun ction
POWER PINS (all the power and ground pins must be connected)
14
15
29
30
45
46
61
62
73
74
89
90
107
108
121
122
133
134
145
146
158
159
CLOCKS
VDD1
VSS1
VDD2
VSS2
VDD3
VSS3
VDD4
VSS4
VDD5
VSS5
VDD6
VSS6
VDD7
VSS7
VDD8
VSS8
VDD9
VSS9
VDD10
VSS10
VDD11
VSS11
Power
Ground
Power
Ground
Power
Ground
Power
Ground
Power
Ground
Power
Ground
Power
Ground
Power
Ground
Power
Ground
Power
Ground
Power
Ground
DC supply
DC ground
DC supply
DC ground
DC supply
DC ground
DC supply
DC ground
DC supply
DC ground
DC supply
DC ground
DC supply
DC ground
DC supply
DC ground
DC supply
DC ground
DC supply
DC ground
DC supply
DC ground (Total 22)
2
XTAL1
I
Crystal 1. A clock pulse
of two crystal pins) with
a: t-5fM0i.n1. 0=-63<20∆0f0<kH+z50c.a1n0-b6.e
applied
to
this
input
(or
one
pin
3
XTAL2
O
Crystal 2. If the internal crystal oscillator is used, the second crystal pin is applied
to this output.
7
VCXO IN
I3
VCXO input signal. This signal is compared to clock A(or B) selected inside the
Multi-HDLC.
8
VCXO OUT
O4 VCXO error signal. This pin delivers the result of the comparison.
10
CLOCKA
I3
Input Clock A (4096kHz or 8192kHz)
11
CLOCKB
I3
Input Clock B (4096kHz or 8192kHz)
12
FRAMEA
I3
Clock A at 8kHz
13
FRAMEB
I3
Clock B at 8kHz
9
DCLK
O8 Data Clock issued from Input Clock A (or B). This clock is delivered by the circuit
at 4096kHz (or 2048kHz). DOUT0/7 are transmitted on the rising edge of thissignal.
DIN0/7 are sampled on the falling edge of this signal.
17
FSCG
O8 Frame synchronization for GCI at 8kHz. This clock is issued from FRAME A (or B).
18
FSCV*
O8 Frame synchronization for V Star at 8kHz
16
FS
I3
Frame synchronization.This signal synchronizes DIN0/7 and DOUT0/7.
19
PSS
O8 Programmable synchronization Signal. The PS bit of connection memory is read
in real time.
Type : I1 = Input TTL ;
I2 = I1 + Pull-up ;
O4 = Output CMOS 4mA ;
O4T = O4 + Tristate ;
O8D = Output CMOS 8mA, Open Drain ;
O8T = Output CMOS 8mA, Tristate
I1 and I3 must be connected to VDD and VSS if not used
I3 = I1 + Hysteresis ;
I4 = I3 + Pull-up ;
O8 = Output CMOS 8mA, ”1” and ”0” at Low Impedance ;
O8DT = Output CMOS 8mA, Open Drain or Tristate ;
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