MC44355 查看數據表（PDF） - Motorola => Freescale

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MC44355

PLL Tuned UHF Audio/Video Modulator ICs for PAL, SECAM and NTSC TV Systems

Motorola => Freescale 

MC44353 MC44354 MC44355

Test Pattern Generator

A simple test pattern is generated on the IC which can be

switched in under bus control to permit a TV receiver to easily

tune in to the modulator output. The pattern consists of two

white vertical bars on a black background and a 976 Hz audio

test signal.

Figure 14. TPSG Typical Video Waveform

TE2

7/10

maximum permissible modulation depth (50 kHz FM

deviation, 85% AM depth), may be adjusted under bus

control.

UHF Oscillator

The UHF oscillator is designed to operate over a range of

450 to 860 MHz. The oscillator drives an external LC tank

circuit differentially, and is tuned by a varicap diode. The

varicap tuning voltage, as described in an earlier section, is

provided from an on chip operational amplifier and external

filter arrangement which is controlled by the PLL Section of

the chip. The UHF frequency thus generated is used by the

modulator as the TV channel carrier frequency.

TE1

0

10

24 28

20

30

3/10

44

40

50

60 64

Video Modulator and Sound Mixer

This section of the circuit accepts as inputs:

1. composite video;

2. the selected sound subcarrier I2C frequency;

3. the UHF carrier frequency at the selected channel;

4. the test pattern generator waveform.

Time in µS

MODULATOR SECTION

Video Input–Clamp and Peak White Clip

The modulator requires a composite video input with

negative going sync pulses and a nominal level of 1.0 Vpp.

This signal is ac coupled to the video input where the sync tip

level is clamped.

The video signal is then passed to a peak white clip circuit

whose function is to soft clip the top of the video waveform if

the amplitude from the sync tip to peak white goes too high.

In this way over-modulation of the carrier by the video is

avoided.

Sound Subcarrier Modulator

The sound modulator system consists of an FM modulator

incorporating the sound subcarrier oscillator, and an AM

modulator. The audio input signal is ac coupled into the

amplifier which then drives the two types of modulator. In

order to provide the accuracy needed for sound subcarrier

frequencies, the sound oscillator consists of a

phase/frequency locked loop. An external LC tank circuit is

required, and the oscillator frequency is controlled by varicap

tuning diodes. The resulting oscillator frequency is divided

down by a divider whose ratio can be controlled via the bus.

A phase/frequency comparator is then used to compare this

frequency with a reference frequency (Fref 2), obtained from

the main PLL Section. The resulting error voltage is used to

control the varicap. To allow all tuning voltage to be derived

from VCC, a hyper–abrupt type of tuning diode is required to

cover the necessary capacitance range. If only a single

sound subcarrier frequency is being used, for example for

PAL only or NTSC, then a less abrupt varicap diode may be

used. The sound phase frequency comparator also requires

an external loop filter.

The oscillator provides subcarrier frequencies of 4.5, 5.5,

6.0 and 6.5 MHz, selectable via the bus. For all applications

except system L, the subcarrier is frequency modulated with

the audio signal. For system L, amplitude modulation is

employed. The level of audio at the input needed to give the

Selection is made via the control bus between the

composite video input and the on chip test pattern generator.

The video and sound inter-carrier are used to amplitude

modulate the UHF carrier. Negative modulation is used,

except in the case of System L where positive modulation is

used.In this part of the circuit, the video modulation depth and

the sound to picture carrier ratio may be programmed under

bus control. In system L mode the video modulation depth

has the same range, but may extend to higher percentage

values.

RF O/P Buffer

The TV signal generated in the video modulator and mixer

section is fed to an emitter follower output stage, capable of

driving a terminated line. This output is provided with a

separate VCC pin in order to avoid large circulating currents

on the IC. It can provide at the output typically 84 dBµV of

signal across a 75 Ω load.

Transient Output Inhibit

To minimize the risk of interference to other channels

while the UHF PLL is acquiring lock on the desired frequency

at Power-on, the UHF output stages are turned off for each

power-on from zero and from standby mode. There is a

timeout of 263 ms until the output is enabled. This allows the

PLL to settle on its programmed frequency. Care must be

taken therefore in determining the loop filter components so

that the loop transient does not exceed this delay.

Data Retention

The circuit contains 4 bytes of memory holding the last

frequency and control bits information. The circuit can retain

this information at power down if a suitable VCC is supplied.

The Standby VCC of nominal 5.0 V must be applied to pin

VCC Mod. The 5.0 V current in data retention is approximately

500 µA. Note that the voltage source on this pin must be able

to supply a much higher current in normal operation (typically

12 mA).

The circuit will enter into Data Retention Mode when the

VCCA pin voltage drops below approximately 3.0 V.

10

MOTOROLA ANALOG IC DEVICE DATA

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