[ASAHI KASEI]
[AK4541]
Please refer to Powerdown/Powerup sequence of multiple codec configuration on the warm reset when the AK4541
is used under the multiple codec configuration .(See page 24, 25)
nBIT_CLK Timing
Tclk_high
BIT_CLK
Tclk_low
50%
nSYNC Timing
SYNC
Tsync_high
Tsync_low
Tsync_period
nSetup and Hold Timing
Tdelay
BIT_CLK
SDATA_IN
Tsetup
SDATA_OUT
SYNC
Thold
nSignal Rise and Fall Times
(50pF external load : from 10% 90% of DVdd)
Trise_clk
Tfall_clk
BIT_CLK
VIH
VIL
VOH
VOL
VIH
VIL
VIH
VIL
Trise_din
SDATA_IN
Tfall_din
Trise_sync
SYNC
Tfall_sync
Trise_dout
SDATA_OUT
Tfall_dout
nAC-link Low Power Mode Timing
Slot 1
Slot 2
BIT_CLK
SDATA_OUT Write to 0x26
Data PR4=1
SDATA_IN
Ts2_pdwn
Dont care
Thold
<M0047-E-01>
-9-
1999/01