MAX198ACAI-T 查看數據表（PDF） - Maxim Integrated
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MAX198ACAI-T Datasheet PDF : 16 Pages
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Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7µF at REF pin; external clock, fCLK = 2.0MHz
with 50% duty cycle; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
REFERENCE INPUT (buffer disabled, reference input applied to REF pin)
Input Voltage Range
Input Current
VREF =
4.18V
Normal, or STANDBY
power-down mode
FULL power-down mode
Input Resistance
REFADJ Threshold for
Buffer Disable
POWER REQUIREMENTS
Normal, or STANDBY power-down mode
FULL power-down mode
Supply Voltage
VDD
Normal mode, bipolar ranges
Supply Current
Normal mode, unipolar ranges
IDD
STANDBY power-down mode
FULL power-down mode (Note 7)
Power-Supply Rejection Ratio
(Note 8)
PSRR
External reference = 4.096V
Internal reference
TIMING
Internal Clock Frequency
fCLK CCLK = 100pF
External Clock Frequency Range fCLK
Acquisition Time
tACQI
tACQE
Internal acquisition
External CLK
Internal CLK
External acquisition (Note 9)
After FULLPD or STBYPD
Conversion Time
Throughput Rate
Bandgap Reference
Start-Up Time
Reference Buffer Settling
tCONV
External CLK
Internal CLK, CCLK = 100pF
External CLK
Internal CLK, CCLK = 100pF
Power-up (Note 10)
To 0.1mV REF bypass
CREF = 4.7µF
capacitor fully discharged CREF = 33µF
DIGITAL INPUTS (D7–D0, CLK, RD, WR, CS) (Note 11)
Input High Voltage
Input Low Voltage
VINH
VINL
Input Leakage Current
IIN
VIN = 0V or VDD
Input Capacitance
CIN
(Note 5)
MIN TYP MAX UNITS
2.4
10
5
VDD - 50mV
4.18
V
400
µA
1
kΩ
MΩ
V
4.75
5.25
V
18
mA
6
10
700
850
µA
60
120
±0.1 ±1/2
LSB
±1/2
1.25 1.56 2.00 MHz
0.1
2.0 MHz
3.0
3.0
5.0
µs
3.0
5
6.0
µs
6.0
7.7
10.0
100
ksps
62
200
µs
8
60
ms
2.4
V
0.8
V
±10
µA
15
pF
4 _______________________________________________________________________________________
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