STP5NC50 查看數據表（PDF） - STMicroelectronics

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STP5NC50

N-CHANNEL 500V - 1.3Ω - 5.5A TO-220/FP/D2PAK/I2PAK PowerMesh™II MOSFET

STMicroelectronics 

STP5NC50 - STP5NC50FP

STB5NC50 - STB5NC50-1

N-CHANNEL 500V - 1.3Ω - 5.5A TO-220/FP/D2PAK/I2PAK

PowerMesh™II MOSFET

TYPE

VDSS

RDS(on)

ID

STP5NC50

STP5NC50FP

STB5NC50

STB5NC50-1

500 V

500 V

500 V

500 V

< 1.5Ω

< 1.5Ω

< 1.5Ω

< 1.5Ω

5.5A

5.5A

5.5A

5.5A

s TYPICAL RDS(on) = 1.3Ω

s EXTREMELY HIGH dv/dt CAPABILITY

s 100% AVALANCHE TESTED

s NEW HIGH VOLTAGE BENCHMARK

s GATE CHARGE MINIMIZED

DESCRIPTION

The PowerMESH™II is the evolution of the first

generation of MESH OVERLAY™. The layout re-

finements introduced greatly improve the Ron*area

figure of merit while keeping the device at the lead-

ing edge for what concerns swithing speed, gate

charge and ruggedness.

APPLICATIONS

s HIGH CURRENT, HIGH SPEED SWITCHING

s SWITH MODE POWER SUPPLIES (SMPS)

s DC-AC CONVERTERS FOR WELDING

EQUIPMENT AND UNINTERRUPTIBLE

POWER SUPPLIES AND MOTOR DRIVES

TO-220

3

1

D2PAK

TO-220FP

123

I2PAK

INTERNAL SCHEMATIC DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

VDS

Drain-source Voltage (VGS = 0)

VDGR

Drain-gate Voltage (RGS = 20 kΩ)

VGS

Gate- source Voltage

ID

Drain Current (continuos) at TC = 25°C

ID

Drain Current (continuos) at TC = 100°C

IDM ( ) Drain Current (pulsed)

PTOT

Total Dissipation at TC = 25°C

Derating Factor

dv/dt(1) Peak Diode Recovery voltage slope

VISO

Insulation Withstand Voltage (DC)

Tj

Operating Junction Temperature

Tstg

Storage Temperature

(•)Pulse width limited by safe operating area

(1)ISD ≤5.5A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.

December 2002

Value

STP5NC50

STB5NC50/-1

STP5NC50FP

500

500

±30

5.5

5.5(*)

3.5

3.5(*)

22

22

100

35

0.8

0.28

3.5

-

2500

-55 to 175

-65 to 175

(*)Limited only by maximum temperature allowed

Unit

V

V

V

A

A

A

W

W/°C

V/ns

V

°C

°C

1/12

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