UPA1727 查看數據表（PDF） - NEC => Renesas Technology
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UPA1727 Datasheet PDF : 4 Pages
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µPA1727
5 ELECTRICAL CHARACTERISTICS (TA = 25 °C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN. TYP. MAX. UNIT
Drain to Source On-state Resistance
RDS(on)1 VGS = 10 V, ID = 5.0 A
14 19 mΩ
RDS(on)2 VGS = 4.5 V, ID = 5.0 A
17 22 mΩ
RDS(on)3 VGS = 4.0 V, ID = 5.0 A
19 25 mΩ
Gate to Source Cut-off Voltage
VGS(off) VDS = 10 V, ID = 1 mA
1.5 2.0 2.5 V
Forward Transfer Admittance
| yfs | VDS = 10 V, ID = 5.0 A
8.0 14
S
Drain Leakage Current
IDSS
VDS = 60 V, VGS = 0 V
10 µA
Gate to Source Leakage Current
IGSS
VGS = ±20 V, VDS = 0 V
±10 µA
Input Capacitance
Ciss
VDS = 10 V
2400
pF
Output Capacitance
Coss
VGS = 0 V
400
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
200
pF
Turn-on Delay Time
td(on)
ID = 5.0 A
24
ns
Rise Time
tr
VGS(on) = 10 V
120
ns
Turn-off Delay Time
td(off)
VDD = 30 V
120
ns
Fall Time
tf
RG = 10 Ω
71
ns
Total Gate Charge
QG
ID = 10 A
45
nC
Gate to Source Charge
QGS
VDD = 48 V
5.9
nC
Gate to Drain Charge
QGD
VGS = 10 V
13
nC
Body Diode Forward Voltage
VF(S-D) IF = 10 A, VGS = 0 V
0.8
V
Reverse Recovery Time
trr
IF = 10 A, VGS = 0 V
45
ns
Reverse Recovery Charge
Qrr
di/dt = 100A/µs
84
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
L
PG.
50 Ω
VDD
VGS = 20 → 0 V
ID
VDD
IAS BVDSS
VDS
Starting Tch
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG
PG.
VGS
0
τ
τ = 1 µs
Duty Cycle ≤ 1 %
RL
VGS
VGS
Wave Form
10 %
0
VGS(on) 90 %
VDD
ID
90 %
ID
ID
0 10 %
Wave Form
90 %
10 %
td(on) tr td(off) tf
ton
toff
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
RL
PG.
50 Ω
VDD
2
Data Sheet G14330EJ1V0DS00
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