AD9430/PCB-CMOS 查看數據表（PDF） - Analog Devices
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AD9430/PCB-CMOS Datasheet PDF : 20 Pages
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PRELIMINARY TECHNICAL DATA
AD9430
DC SPECIFICATIONS (AVDD= DrVDD = 3.3V; TMIN = -40°C, TMAX = +85°C, Fin = -0.5dBFS, 1.235V External
reference, LVDS Output Mode)
Test
AD9430BSV-170
Parameter
Temp Level Min Typ Max Units
RESOLUTION
12
Bits
ACCURACY
No Missing Codes
Full
I
Guaranteed
Offset Error
25°C
I
tbd
mV
Gain Error
25°C
I
Differential Nonlinearity (DNL)
25°C
I
Integral Nonlinearity (INL)
25°C
I
tbd
+/- .3
+/- .5
% FS
LSB
LSB
TEMPERATURE DRIFT
Offset Error
Full
V
tbd
ppm/°C
Gain Error
Full
V
tbd
ppm/°C
POWER SUPPLY REJECTION
Full
V
± tbd
mV/V
REFERENCE OUT (VREF)
Full
V
1.235
V
ANALOG INPUTS (AIN, AIN )
Input Voltage Range (AIN– AIN )1
Input Common Mode Voltage
Input Resistance
Input Capacitance
Full
Full
Full
Full
V
V
V
V
± .768
2.8
3
5
V
V
kΩ
pF
POWER SUPPLY
Supply Voltages
AVDD
DrVDD
Supply Current
I ANALOG (AVDD= 3.3V) 2
I DIGITAL (DrVDD = 3.3V) 2
POWER CONSUMPTION3
Full
V
3.0 3.3 3.6
V
Full
V
3.0 3.3 3.6
V
Full
V
335
mA
Full
V
55
mA
Full
V
1.29
W
NOTES
1 Nominal Differential Full Scale = .766 V * 2 = 1.53 Vp-p differential for S5 = 0; Nominal Differential Full Scale = .766 Vp-p d ifferential for S5 = 1 (see Fig. X)
2 IAVDD and IDrVDD are measured with an analog input of 10.3MHz, -0.5dBFs, sine wave, rated Encode rate and in LVDS output mode. See Typical Performance
Characteristics and Applications section for IDrVDD. 3 Power Consumption is measured with a DC input at rated Encode rate in LVDS output mode
DIGITAL SPECIFICATIONS (AVDD= 3.3V, DrVDD = 3.3V; TMIN = -40°C, TMAX = +85°C)
Test AD9430BSV-170
Parameter (Conditions)
Temp Level Min Typ Max Units
ENCODE AND DATA SYNC
INPUTS (ENC, ENC , DS, DS/ )
Differential Input Voltage1
Full IV 0.2
V
Encode Common Mode Voltage
Full IV
1.5
V
Input Resistance
Input Capacitance
Full IV
5.5
kΩ
Full IV
4
pF
LOGIC INPUTS ( S1,S2,S4,S5 )
Logic ‘1’ Voltage
Logic ‘0’ Voltage
Input Resistance
Input Capacitance
Full IV 2.0
Full IV
Full IV
30
Full IV
4
V
.8 V
kΩ
pF
LOGIC OUTPUTS (Demux Mode)
Logic “1” Voltage2
Logic “0” Voltage2
Full
IV DrVDD-0.05
Full IV
LOGIC OUTPUTS (LVDS Mode)2,3
V
0.05 V
VOD Differential Output Voltage
VOS Output Offset Voltage
Output Coding
Full IV 247
454 mV
Full IV 1.125
1.375 V
Full IV Two’s Comp or Binary
NOTES 1All AC specifications tested by driving ENCODE and ENCODE differentially | ENCODE - ENCODE | > 200mV
2Digital Output Logic Levels: DrVDD= 3.3V, CLOAD = 5pF. 3 LVDS Rl=100 ohms, LVDS Output Swing Set Resistor = 3.7K
-2-
4/01/2002 REV. PrG
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