VITESSE
SEMICONDUCTOR CORPORATION
STS-48c Packet/ATM Over SONET/SDH Device
With Integrated Mux/Demux and Clock and Data Recovery
Preliminary Datasheet
VSC9142
AC Characteristics
Figure 1: Tx Serial Line Interface Timing Dependencies
TLCLKSER+
TLOUTSER+/-
TP,TLOUTSER
Table 1: Tx Serial Line Interface
Symbol
Description
Min
Max
fTLCLKSER
TLCLKSER+/- clock frequency (nominal)
-
2488
Tdc, TLCLKSER
TLCLKSER+/- duty cycle
40
60
Tr/f, TLCLKSER TLCLKSER+/- rise/fall time (20-80%)
-
120
Tp, TLOUTSER
TLCLKSER+ rising edge to TLOUTSER+/- valid
-75
+75
TJS
Output Data Jitter RMS
-
4
TJS, Peak
Output Data Jitter Peak-to-Peak
-
40
CMU Reference Clock Frequencies are 78 MHz, 155 MHz, 311 Mhz, and 622 MHz
Jitter tested to SONET specifications with 2ps RMS jitter on the Reference Clock
Figure 2: Rx Parallel Line Interface Timing Dependencies
Unit
MHz
%
ps
ps
ps
ps
RLCLK4+
RLIN4[3..0]+/-
RLPRTY4+/-
TSU,RLIN4
TH,RLIN4
Table 2: Rx Parallel Line Interface
Symbol
Description
fRLCLK4
Tdc, RLCLK4
RLCLK4+/- clock frequency (nominal)
RLCLK4+/- duty cycle
Min Max Unit
-
622.08 MHz
45
55
%
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VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52319-0, Rev. 3.1
6/12/00