VSC9142 查看數據表（PDF） - Vitesse Semiconductor
零件编号
产品描述 (功能)
生产厂家
VSC9142
Vitesse Semiconductor
VSC9142 Datasheet PDF : 42 Pages
| |||
VITESSE
SEMICONDUCTOR CORPORATION
STS-48c Packet/ATM Over SONET/SDH Device
With Integrated Mux/Demux and Clock and Data Recovery
Preliminary Datasheet
VSC9142
Table 7: Tx Overhead Access Port
Symbol
Description
Min
fTTOHCLK
dcTTOHCLK
TR/F, TTOHCLK
TSU, TTOH
TTOHCLK Clock Frequency (nominal)
-
TTOHCLK Duty Cycle
40
TTOHCLK Rise/Fall Time
-
TTOH[0..3], TTOHEN Setup Time to TTOHCLK Rising/Falling
Edge7)
15.0
TH, TTOH
TTOH[0..3], TTOHEN Hold Time to TTOHCLK Rising/Falling
Edge7)
-1.0
TP, TTOH
TTOHCLK Rising/Falling Edge8) to TTOHREN, TTOHFP
Valid
-3.0
5) Active edge of clock is programmable for group of inputs for each independent port.
6) Active edge of clock is programmable for group of outputs for each independent port.
7) Active edge of clock is programmable for group of inputs.
8) Active edge of clock is programmable for group of outputs.
All output times are for 50 pF load.
Figure 8: JTAG Interface Timing Dependencies
Max
38.88
60
2.0
-
-
+7.0
Unit
MHz
%
ns
ns
ns
ns
TCK
TMS
TDI
TDO
TSU, JTIN
TH, JTIN
TP, JTOUT
Table 8: JTAG Interface
Symbol
Description
fTCK
dcTCK
TSU, JTIN
TH, JTIN
TP, JOUT
TCK Frequency
TCK Duty Cycle
TMS/TDI Setup Time to TCK Rising Edge
TMS/TDI Hold Time to TCK Rising Edge
TCK Falling Edge to TDO Valid
Min Max Unit
-
1
MHz
40
60
%
50
-
ns
50
-
ns
1.5
50
ns
Page 18
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52319-0, Rev. 3.1
6/12/00
Share Link: