NT68P81 查看數據表（PDF） - Novatek Microelectronics

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NT68P81

USB Keyboard Micro-Controller

Novatek Microelectronics 

15. Reset Source Summary

These are 5 reset sources in NT68P81 as shown below.

No.

Type

1

Cold

2

Cold

3

Cold

4

Warm -1

5

Warm -2

Function

External Pin ( RESET )

Power-on Reset

USB Reset Signaling

Resume Reset

Watch-dog Reset

Description

Applied Externally

Reset after Power-on

10 ms Reset Period

USB Reset Period

Reset every 0.15S (OSC = 6MHz)

NT68P81

NT68P81 can also be reset externally through the RESET pin. A reset is initialed when the signal at the RESET pin is

held Low for at least 10 system clocks. When RESET signal goes high, the NT68P81 begins to work. The following

shows the definition of RESET input low pulse width.

VDD

20%VDD

Trstb

VDD

20%VDD

16. PS/2 Mouse Application

A PS/2 mouse interface is implemented in P32 (CLK), P33 (DATA) and P34 (Power Control). The timing diagrams are

described as follows.

CLK

DATA

1st

2nd

10th

CLK

CLK

CLK

T4

T1

T3

T2 T1A

Start Bit

Bit 0

Parity Bit

Auxiliary Device Sending Data Timings

11th

CLK

T5

Stop Bit

Timing

T1

T1A

T2

T3

T4

T5

Description

MIN/MAX

Time from DATA transaction to falling edge of CLK 1

5/25u s

Time from DATA transaction to falling edge of CLK 2-11

5/25u s

Time from rising edge of CLK to DATA transaction

5/T4-5u s

Duration of CLK inactive (LOW)

30/50u s

Duration of CLK active (HIGH)

30-50u s

Time

does

to Auxiliary Device inhibit after

not start another transmission

clock

11

to

ensure

the

Auxiliary

Device

>0/50u

s

19

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