CXB1454R 查看數據表（PDF） - Sony Semiconductor

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CXB1454R

VGA/SVGA/XGA 24bit Receiver

Sony Semiconductor 

CXB1454R

VCCA/G/T

TTLout

Cprobe

VCC

CXB1454R

CL'

VEEA/G/T

oscillo-

scope

CL' + Cprobe = 10pF

Fig. 4. Pixel/Sync/Cntl/DE waveform measurement

Timing Chart

1/Fsftclk

2.0V

SFTCLK

Vth

0.8V

Torc

Tofc

Setup/hold time is refered from

rising edge in CLKPOL = GND

falling edge in CLKPOL = Vcc or OPEN

Tsetup

REDxx

GRNxx

BLUxx

H/Vsync

CNTL

DE

Tord

2.0V

0.8V

Tofd

Dsftclk/Fsftclk

Thold

Fig. 5. TTL output timing

Pixel

Sync/Cntl/DE

SftClk

REFRQP

REFRQN

SDATAP

SDATAN

error

TAclk

Indeterminate

Indeterminate

TDclk

Fig. 6. Refclk request timing

–7–

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