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FS6012-02 查看數據表(PDF) - AMI Semiconductor

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FS6012-02
AMI
AMI Semiconductor AMI
FS6012-02 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
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August 1998
Table 12: AC Timing Specifications, continued
Unless otherwise stated, VDD = 5.0V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not currently production tested to any specific limits. MIN and MAX characterization data are ± 3σ from typical.
PARAMETER
SYMBOL
CONDITIONS/DESCRIPTION
CLOCK
(MHz)
MIN.
TYP.
MAX. UNITS
Clock Output (ACLK)
Duty Cycle *
Jitter, Long Term (σy2(τ)) *
Jitter, Period (peak-peak) *
Clock Stabilization Time *
Rise Time *
Fall Time *
32.0000 44
48
11.2896 48
52
7.3728
48
52
1.8432
48
52
From rising edge to rising edge at 2.5V
24.0000 44
27.0000 44
48
%
48
11.2912 48
52
7.3738
48
52
1.8434
48
52
24.0033 44
48
32.0000
1700
11.2896
510
7.3728
600
1.8432
2360
tj(LT)
From rising edge to 1st rising edge after
500µs at 2.5V, CL = 15pF, all PLLs active
24.0000
27.0000
330
230
ps
11.2912
520
7.3738
940
1.8434
890
24.0033
920
32.0000
440
11.2896
670
7.3728
600
1.8432
750
tj(P)
From rising edge to the next rising edge at 24.0000
2.5V, CL = 15pF, all PLLs active
27.0000
510
1660
ps
11.2912
680
7.3738
560
1.8434
710
24.0033
600
tSTB
Output active from power-up
770
µs
tr
VO = 0.5V to 4.5V; CL = 15pF
3.5
ns
tf
VO = 4.5V to 0.5V; CL = 15pF
1.8
ns
,62
12
8.19.98

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