FS6012-02 查看數據表（PDF） - AMI Semiconductor
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FS6012-02 Datasheet PDF : 20 Pages
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August 1998
Table 13: AC Timing Specifications, continued
Unless otherwise stated, VDD = 5.0V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not currently production tested to any specific limits. MIN and MAX characterization data are ± 3σ from typical.
PARAMETER
SYMBOL
CONDITIONS/DESCRIPTION
CLOCK
(MHz)
MIN.
TYP.
MAX. UNITS
Clock Output (UCLK)
Duty Cycle *
Jitter, Long Term (σy2(τ)) *
Jitter, Period (peak-peak) *
Clock Stabilization Time *
Rise Time *
Fall Time *
32.0000 44
48
6.4196
48
52
12.8392 48
52
6.5067
48
52
From rising edge to rising edge at 2.5V
13.0133 48
6.5000
48
52
%
52
13.0000 48
52
24.5454 45
49
27.0000 44
48
8.1818
48
52
32.0000
1380
6.4196
850
12.8392
810
6.5067
880
tj(LT)
From rising edge to 1st rising edge after
500µs at 2.5V, CL = 15pF, all PLLs active
13.0133
6.5000
870
660
ps
13.0000
930
24.5454
770
27.0000
380
8.1818
720
32.0000
470
6.4196
470
12.8392
510
6.5067
620
tj(∆P)
From rising edge to the next rising edge at 13.0133
2.5V, CL = 15pF, all PLLs active
6.5000
620
650
ps
13.0000
550
24.5454
550
27.0000
1940
8.1818
610
tSTB
Output active from power-up
600
µs
tr
VO = 0.5V to 4.5V; CL = 15pF
3.6
ns
tf
VO = 4.5V to 0.5V; CL = 15pF
2.0
ns
,62
13
8.19.98
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