HDD16M64D8W 查看數據表（PDF） - Hanbit Electronics Co.,Ltd
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产品描述 (功能)
生产厂家
HDD16M64D8W
Hanbit Electronics Co.,Ltd
HDD16M64D8W Datasheet PDF : 10 Pages
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HANBit
HDD16M64D8W
H
X
X
X
Exit
L
H
X
L
V
V
V
DM
H
X
V
X
8
H
X
X
X
9
No operation command
H
X
X
X
L
H
H
H
9
Note :
1. OP Code : Operand Code. A0 ~ A12 & BA0 ~ BA1 : Program keys. (@EMRS/MRS)
2. EMRS/ MRS can be issued only at all banks precharge state.
A new command can be issued 2 clock cycles after EMRS or MRS.
3. Auto refresh functions are same as the CBR refresh of DRAM.
The automatical precharge without row precharge command is meant by "Auto".
Auto/self refresh can be issued only at all banks precharge state.
4. BA0 ~ BA1 : Bank select addresses.
If both BA0 and BA1 are "Low" at read, write, row active and precharge, bank A is selected.
If BA0 is "High" and BA1 is "Low" at read, write, row active and precharge, bank B is selected.
If BA0 is "Low" and BA1 is "High" at read, write, row active and precharge, bank C is selected.
If both BA0 and BA1 are "High" at read, write, row active and precharge, bank D is selected.
5. If A10/AP is "High" at row precharge, BA0 and BA1 are ignored and all banks are selected.
6. During burst write with auto precharge, new read/write command can not be issued.
Another bank read/write command can be issued after the end of burst.
New row active of the associated bank can be issued at tRP after the end of burst.
7. Burst stop command is valid at every burst length.
8. DM sampled at the rising and falling edges of the DQS and Data-in are masked at the both edges (Write DM latency is 0).
9. This combination is not defined for any function, which means "No Operation(NOP)" in DDR SDRAM.
PACKAGE DIMENSIONS
Unit : mm
Front – Side
URL : www.hbe.co.kr
REV 2.0 (November.2002)
9
HANBit Electronics Co.,Ltd.
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