NX25F011B 查看數據表（PDF） - Unspecified

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NX25F011B

1M-BIT, 2M-BIT, AND 4M-BIT SERIAL FLASH MEMORIES WITH 4-PIN SPI INTERFACE

Unspecified 

NX25F011B

NX25F021B

NX25F041B

Table 2A. Write Protect Range Sector Selection (Hex)

Write Protect

Range Config. Bits

WR3 WR2 WR1 WR0

00 00

00

00

00

01

01

01

01

10

10

10

10

11

11

11

01

10

11

00

01

10

11

00

01

10

11

00

01

10

11 11

(NX25F011B)

Write Protected Sectors

WD=0

WD=1

None

None

000 - 01FH

000 - 03FH

000 - 05FH

000 - 07FH

000 - 09FH

000 - 0BFH

000 - 0DFH

000 - 0FFH

000 - 11FH

000 - 13FH

000 - 15FH

000 - 17FH

000 - 19FH

000 - 1BFH

1 E0 - 1FF

1 C0 - 1FF

1 A0 - 1FF

1 80 - 1FF

1 60 - 1FF

1 40 - 1FF

1 20 - 1FF

1 00 - 1FF

0 E0 - 1FF

0 C0 - 1FF

0 A0 - 1FF

0 80 - 1FF

0 60 - 1FF

0 40 - 1FF

ALL

ALL

Table 2C. Write Protect Range Sector Selection (Hex)

Write Protect

Range Config. Bits

WR3 WR2 WR1 WR0

00

00

00

00

01

01

01

01

10

10

00

01

10

11

00

01

10

11

00

01

10

10

11

10

11

00

11

11

01

10

11 11

(NX25F041B)

Write Protected Sectors

1

WD=0

WD=1

None

None

000 - 01FH

000 - 03FH

2 7 E0 - 7FFH

7 C0 - 7FFH

000 - 05FH

7 A0 - 7FFH

000 - 07FH

000 - 09FH

000 - 0BFH

7 80 - 7FFH

3 7 60 - 7FFH

7 40 - 7FFH

000 - 0DFH

7 20 - 7FFH

000 - 0FFH

000 - 11FH

4 7 00 - 7FFH

6 E0 - 7FFH

000 - 13FH

6 C0 - 7FFH

000 - 15FH

000 - 17FH

000 - 19FH

6 A0 - 7FFH

5 6 80 - 7FFH

6 60 - 7FFH

000 - 1BFH

6 40 - 7FFH

ALL

ALL

6

Table 2B. Write Protect Range Sector Selection (Hex)

Write Protect

Range Config. Bits

WR3 WR2 WR1 WR0

00 00

00

00

01

10

00

01

01

11

00

01

01

01

10

10

11

00

10

10

10

01

10

11

11

11

11

00

01

10

11 11

(NX25F021B)

Write Protected Sectors

WD=0

WD=1

None

None

000 - 01FH

000 - 03FH

3 E0 - 3FF

3 C0 - 3FF

000 - 05FH

000 - 07FH

000 - 09FH

3 A0 - 3FF

3 80 - 3FF

3 60 - 3FF

000 - 0BFH

000 - 0DFH

000 - 0FFH

3 40 - 3FF

3 20 - 3FF

3 00 - 3FF

000 - 11FH

000 - 13FH

000 - 15FH

2 E0 - 3FF

2 C0 - 3FF

2 A0 - 3FF

000 - 17FH

000 - 19FH

000 - 1BFH

2 80 - 3FF

2 60 - 3FF

2 40 - 3FF

ALL

ALL

7 HOLD-R/B, HR[1:0]

The Hold-Ready/Busy (HOLD-R/B) bits HR1 and HR0 are

located at bits CF[1:0] of the configuration register. These

two bits select one of four possible functions: No Connect,

8 HOLD input, R/B Output, or R/B Output with open drain. The

factory setting for the pin is “No Connect”.

HR1 HR0 Pin Configuration

0

0

HOLD input

9

0

1

No Connect

1

0

R/B Output (Open Drain)

1

1

R/B Output

10

Configured as a R/B output, the pin can serve as a system

interrupt. When R/B is high, the array is ready to be

programmed. When R/B is low, it is busy programming. If

1 1 configured with an open-drain, an external pull-up resistor

should be used.

As a HOLD input, the pin can be used in conjunction with

1 2 the CS and SCK pin to suspend a serial command

sequence without resetting the command. This can be

useful if a command is in process and a higher priority

task on the same SPI bus needs to be attended to. To

NexFlash Technologies, Inc.

11

PRELIMINARY NXSF016F-1201

12/12/01 ©

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