TQ8101-M 查看數據表（PDF） - TriQuint Semiconductor
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TQ8101-M Datasheet PDF : 14 Pages
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TQ8101C
Table 5. Signal Descriptions
Pin
Signal
Type
1
VEE
2
GND
3
RXCKP
In
4
RXCKN
In
5
GND
6
RXDTN
In
7
RXDTP
In
8
GND
9
TXCK
Out
10
TXDTP
Out
11
GND
12
TXDTN
Out
13
MO
Out
14
GND
15
OOF
In
16
DXRCK
Tri Out
17
GND
18
VCC
19
GND
20
DXDT7
Tri Out
21
DXDT6
Tri Out
22
GND
23
DXDT5
Tri Out
24
DXDT4
Tri Out
25
GND
26
DXDT3
Tri Out
27
DXDT2
Tri Out
28
GND
29
DXDT1
Tri Out
30
DXDT0
Tri Out
31
GND
32
DXCK
Tri Out
33
DXSYNC Tri Out
34
GND
(Continues on next page)
Description
Negative power supply input (–5.2V)
Ground
Receive bit-serial clock; differential ECL, positive
Receive bit-serial clock; differential ECL, negative
Ground
Receive bit-serial data (MSB first); differential ECL, negative
Receive bit-serial data (MSB first); differential ECL, positive
Ground
Transmit bit-serial clock; single-ended ECL level
Transmit bit-serial data (MSB first); differential ECL, positive
Ground
Transmit bit-serial data (MSB first); differential ECL, negative
NAND tree monitor output; TTL level
Ground
Out of frame; TTL level; rising-edge initiated frame search
Demultiplexer reference clock; TTL level; 50-pF backplane driving capacity
Ground
Positive power supply input (+5.0V)
Ground
Demultiplexer byte-serial data (bit 7); TTL level
Demultiplexer byte-serial data (bit 6); TTL level
Ground
Demultiplexer byte-serial data (bit 5); TTL level
Demultiplexer byte-serial data (bit 4); TTL level
Ground
Demultiplexer byte-serial data (bit 3); TTL level
Demultiplexer byte-serial data (bit 2); TTL level
Ground
Demultiplexer byte-serial data (bit 1); TTL level
Demultiplexer byte-serial date (bit 0); TTL level
Ground
Demultiplexer byte-serial clock; TTL level
Demultiplexer synchronization; TTL level
Ground
8
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