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MAX17040(2010) 查看數據表(PDF) - Maxim Integrated

零件编号
产品描述 (功能)
生产厂家
MAX17040
(Rev.:2010)
MaximIC
Maxim Integrated MaximIC
MAX17040 Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
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ABSOLUTE MAXIMUM RATINGS
Voltage on CTG Pin Relative to VSS .......................-0.3V to +12V
Voltage on CELL Pin Relative to VSS......................-0.3V to +12V
Voltage on All Other Pins Relative to VSS.................-0.3V to +6V
Operating Temperature Range ...........................-40°C to +85°C
Power Dissipation ..........1333mW at +70°C (derate 16.7mW/°C)
Storage Temperature Range .............................-55°C to +125°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS RECOMMENDED DC OPERATING CONDITIONS
(2.5V VDD 4.5V, TA = -20°C to +70°C, unless otherwise noted.)
PARAMETER
Supply Voltage
Data I/O Pins
MAX17040 CELL Pin
MAX17041 CELL Pin
SYMBOL
VDD (Note 1)
SCL, SDA, (Note 1)
EO, SEO
VCELL
VCELL
(Note 1)
(Note 1)
CONDITIONS
MIN
+2.5
-0.3
-0.3
-0.3
TYP
MAX
+4.5
UNITS
V
+5.5
V
+5.0
V
+10.0
V
DC ELECTRICAL CHARACTERISTICS
(2.5V VDD 4.5V, TA = -20°C to +70°C, unless otherwise noted. Contact Maxim for VDD greater than 4.5V.)
PARAMETER
Active Current
Sleep-Mode Current (Note 2)
Time-Base Accuracy (Note 3)
MAX17040 Voltage-
Measurement Error
MAX17041 Voltage-
Measurement Error
CELL Pin Input Impedance
Input Logic-High:
SCL, SDA, EO, SEO
SYMBOL
IACTIVE
ISLEEP
CONDITIONS
With on-chip clock in use
With external 32kHz clock
VDD = 2.0V
tERR
VDD = 3.6V at +25°C
TA = 0°C to +70°C
TA = -20°C to +70°C
TA = +25°C, VIN = VDD
VGERR
RCELL
TA = +25°C, 5.0V < VIN < 9.0V
5.0 < VIN < 9.0
VIH
(Note 1)
MIN TYP
50
40
0.5
1
-1
-2
-3
-12.5
-30
-30
-60
15
1.4
Input Logic-Low:
SCL, SDA, EO, SEO
Output Logic-Low: SDA
Pulldown Current: SCL, SDA
Input Capacitance: EO
Bus Low Timeout
VIL
VOL
IPD
CBUS
tSLEEP
(Note 1)
IOL = 4mA (Note 1)
VDD = 4.5V, VPIN = 0.4V
(Note 4)
0.2
1.75
MAX
75
65
1.0
3
+1
+2
+3
+12.5
+30
+30
+60
UNITS
µA
µA
%
mV
M
V
0.5
V
0.4
V
µA
50
pF
2.5
s
2 _______________________________________________________________________________________

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