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VSC8161 查看數據表(PDF) - Vitesse Semiconductor

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VSC8161 Datasheet PDF : 16 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
2.488Gb/s SONET / SDH
16:1 Mux with Clock Generator and Laser Driver
Advance Product Information
VSC8161
Figure 3: Laser Driver Output
IOUT– IOUT+
XX
OUTPUT
DIFF
PAIR
IMOD
IBIAS
VIP
X VIB
X
MIP
MIB
IOUT+, IOUT- Outputs
The IOUT+ and IOUT- pins are designed to interface to a laser diode. A logic “0” appears as less current
(higher voltage) at the IOUT+ pin, and less light from a series laser diode. A logic “1” appears as more current
(lower voltage) at the IOUT+ pin, and more light from a series laser diode. The polarity can be reversed through
use of the DINVERT signal pin. The current difference depends upon the voltage (VIP - MIP) applied at the
VIP pin. Applying (VIP - MIP) = 0V will turn off the modulation current. Applying (VIP - MIP) = approxi-
mately 2V will maximize the modulation current. Applying (VIP - MIP) up to 5.2V is allowed, but not likely to
be useful. Use caution to avoid exceeding the absolute maximum current ratings (see table). Operation of the
bias current is independent of, and similar to, the operation of the modulation current. Pins MIB and VIB are
used to monitor and control the bias current.
It is recommended that feed back circuits be utilized to regulate the desired modulation and bias currents.
This is illustrated with examples in figure 4. Separate circuits are used, since the modulation and bias currents
are independent.
Page 4
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52208-0, Rev.2.1
8/28/98

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