74LVC1G386(2007) 查看數據表（PDF） - NXP Semiconductors.

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74LVC1G386
(Rev.:2007)

3-input EXCLUSIVE-OR gate

NXP Semiconductors. 

74LVC1G386

3-input EXCLUSIVE-OR gate

Rev. 02 — 3 September 2007

Product data sheet

1. General description

The 74LVC1G386 provides a 3-input EXCLUSIVE-OR function.

The input can be driven from either 3.3 or 5 V devices. This feature allows the use of

these devices in a mixed 3.3 and 5 V environment.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall

time.

This device is fully specified for partial power-down applications using IOFF. The IOFF

circuitry disables the output, preventing the damaging backflow current through the device

when it is powered down.

2. Features

s Wide supply voltage range from 1.65 to 5.5 V

s High noise immunity

s Complies with JEDEC standard:

x JESD8-7 (1.65 V to 1.95 V)

x JESD8-5 (2.3 V to 2.7 V)

x JESD8B/JESD36 (2.7 V to 3.6 V)

s ±24 mA output drive (VCC = 3.0 V)

s Latch-up performance exceeds 250 mA

s CMOS low power consumption

s Direct interface with TTL levels

s Inputs accept voltages up to 5 V

s ESD protection:

x HBM EIA/JESD22-A114E exceeds 2000 V

x MM EIA/JESD22-A115-A exceeds 200 V.

s SOT363 and SOT457 package

s Specified from −40 to +85 °C and −40 to +125 °C.

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

74LVC1G386GW −40 °C to +125 °C SC-88

74LVC1G386GV −40 °C to +125 °C SC-74A

Description

plastic surface-mounted package; 6 leads

plastic surface-mounted package (TSOP6); 6 leads

Version

SOT363

SOT457

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