A25L10P 查看數據表（PDF） - AMIC Technology

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A25L10P

2Mbit / 1Mbit / 512Kbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface

AMIC Technology 

A25L05P MEMORY ORGANIZATION

The memory is organized as:

„ 65,536 bytes (8 bits each)

„ 1 sectors (one (4/4/8/16/32) Kbytes

„ 256 pages (256 bytes each).

Table 4. Memory Organization

A25L05PT Top Boot Block Address Table

Sector

Sector Size (Kbytes)

1

4

1

4

1

8

1

16

1

32

A25L05PU Bottom Boot Block Address Table

Sector

Sector Size (Kbytes)

0-4

32

0-3

16

0-2

8

0-1

4

0-0

4

A25L20P/A25L10P/A25L05P Series

Each page can be individually programmed (bits are

programmed from 1 to 0). The device is Sector or Bulk

Erasable (bits are erased from 0 to 1) but not Page Erasable.

0F000h

0E000h

0C000h

08000h

00000h

Address Range

0FFFFh

0EFFFh

0DFFFh

0BFFFh

07FFFh

08000h

04000h

02000h

01000h

00000h

Address Range

0FFFFh

07FFFh

03FFFh

01FFFh

00FFFh

(August, 2007, Version 1.0)

10

AMIC Technology Corp.

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