ACPL-M75L 查看數據表（PDF） - Avago Technologies

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ACPL-M75L

Single-channel High Speed 15 MBd CMOS optocoupler with Glitch-Free Power-Up Feature

Avago Technologies 

Powering Sequence

VDD needs to achieve a minimum level of 3V before pow-

ering up the output connecting component.

Input Limiting Resistors

ACPL-M75L is direct current driven (Figure 8), and thus

eliminate the need for input power supply. To limit the

amount of current flowing through the LED, it is recom-

mended that a 530ohm resistor is connected in series with

anode of LED (i.e. Pin 1 for ACPL-M75L) at 5V input signal.

At 3.3V input signal, it is recommended to connect 250Ω

resistor in series with anode of LED. The recommended

limiting resistors is based on the assumption that the driv-

er output impedence is 50Ω (as shown in Figure 11).

Speed Improvement

A peaking capacitor can be placed across the input cur-

rent limit resistor (Figure 11) to achieve enhanced speed

performance. The value of the peaking cap is dependent

to the rise and fall time of the input signal and supply volt-

ages and LED input driving current (If). Figure 12 shows

significant improvement of propagation delay and pulse

with distortion with added peak capacitor at driving cur-

rent of 6mA for both 3.3V and 5V power supply.

Common Mode Rejection for ACPL-M75L

Figure 13 shows the recommended drive circuit for the

ACPL-M75L for optimal common-mode rejection perfor-

mance. Two LED-current setting resistors are used instead

of one. This is to balance the common mode impedance

at LED anode and cathode. Common-mode transients can

capacitively couple from the LED anode (or cathode) to

the output-side ground causing current to be shunted

away from the LED (which can be bad if the LED is on) or

conversely cause current to be injected into the LED (bad

if the LED is meant to be off ). Figure14 shows the parasitic

capacitances which exists between LED anode/cathode

and output ground (CLA and CLC). Also shown in Figure 14

on the input side is an AC-equivalent circuit.

Table 1 indicates the directions of ILP and ILN flow depend-

ing on the direction of the common-mode transient. For

transients occurring when the LED is on, common-mode

rejection (CML, since the output is in the “low” state) de-

pends upon the amount of LED current drive (IF). For con-

ditions where IF is close to the switching threshold (ITH),

CML also depends on the extent which ILP and ILN balance

each other. In other words, any condition where common-

mode transients cause a momentary decrease in IF (i.e.

when dVCM/dt>0 and |IFP| > |IFN|, referring to Table 1) will

cause common-mode failure for transients which are fast

enough.

Likewise for common-mode transients which occur when

the LED is off (i.e. CMH, since the output is “high”), if an im-

balance between ILP and ILN results in a transient IF equal

to or greater than the switching threshold of the optocou-

pler, the transient “signal” may cause the output to spike

below 2V (which constitutes a CMH failure).

By using the recommended circuit in Figure 13, good CMR

can be achieved. The resistors recommended in Figure 13

include both the output impedence of the logic driver cir-

cuit and the external limiting resistor. The balanced ILED-

setting resistors help equalize the common mode voltage

change at anode and cathode to reduce the amount by

which ILED is modulated from transient coupling through

CLA and CLC.

Table 1. Effects of Common Mode Pulse Direction on Transient ILED

If dVCM/dt Is:

positive (>0)

negative (<0)

then ILP Flows:

away from LED

anode through CLA

toward LED

anode through CLA

and ILN Flows:

away from LED

cathode through CLC

toward LED

cathode through CLC

If |ILP| < |ILN|,

LED IF Current

Is Momentarily:

increased

decreased

If |ILP| > |ILN|,

LED IF Current

Is Momentarily:

decreased

increased

11

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