AD1881 查看數據表（PDF） - Analog Devices

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AD1881

AC'97 SoundMAX® Codec

Analog Devices 

ANALOGDEVICESfAX-ON-DEHANDHOTLINE - Page 29

AD1881

Sample Rate I (Index 7Ah)

Reg

Num

Name

D15 D14 D13 DIZ Dll DI0 D9 D8 D7 D6 DS D4 D3 DZ Dl DO Default

7Ah Smnple Rate I SR11S SRll4 SR113 SR112 SKIll SRllO SRI9 SRI8 SRI7 SRI6 SRIS SRI4 SRB SRU SR11 SRIO 8880h

Note: 2Ch is an alias for 7Ah. The VRA bit in register 2Ah must be set for the alias to work; if a zero is written to VRA, both sample

rates are reset to 48k.

SRI [15:0]

Writing to this register allows the user to program the sampling frequency from 7 kHz (IB58h) to 48 kHz (BBSOh)

in I Hertz increments. Programming a value greater than 4S kHz or less than 7 kHz may cause unpredictable

results.

Vendor ID Registers (Index 7Ch-7Eh)

OBSOLETE Reg

Nun>

Name

DlS D14 D13 D12 Dll DI0 D9 D8 D7 D6 DS D4 D3 DZ 01 00 Default

7Ch Vendor IDI F7 F6 FS F4 F3 F2 FI FO S7 86 85 84 83 8Z SI SO 4144h

S[7:0]

F[7:0]

This register is ASCII encoded to "A."

This register is ASCII encoded to "D."

Reg

Nun>

Name

DI5 014 DB

7Eh Vendor 102 T7 T6 TS

012 011 010 09 08 07 06 05 04 03 02 01 00 Oefuul

T4 T3 T2 TI TO REV7 REV6 REVS REV4 REV3 REV2 REVI REVO S3K..Xh

T[7:0]

This register is ASCII encoded to "S."

REV [7:0]

Revision Register field contains the revision number.

These bits are read-only and should be verified before accessing vendor defmed features.

AD1819/AD1819A/ADl881USER-VISIBLE DIFFERENCES

- Supports 3.3 V digital VDD (as well as 5 V).

Register Differences

- Reserved register bits always yield zero when read.

- Writes to odd registers have no effect, instead of writing preceding even register. Reads of odd registers always retum zero instead

of value of preceding even register.

- Writing ones to bits 5 or 13 ofregister 02h no longer forces bits 4:0 or 12:S to ones.

- Registers 04h and OSh are now reserved.

- It is no longer required that the mixer not be powered down in order to power up the DACs, and the mixer can be powered down

without also powering down the DACs.

- Aliases 2Ch (7Ah) and 32h (7Sh) have been added with AC '97 2.0 behavior.

- Registers 2Sh and 2Ah have been added; writing a zero to the LSB of register 2Ah resets registers 2Ch (7Ah) and 32h (7Sh).

- Register 76h default value is 0404h instead of OOOOhD; AM, DMS and LPMIX bits have been added.

- LSB of register 7Eh is 40h instead of 00h-o3h.

Analog Differences

- CD to LINE_Our path noninverting instead of inverting.

- Mixer feed through when powered off eliminated.

-20-

REV. 0

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