AD5441 查看數據表（PDF） - Analog Devices

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AD5441

12-Bit Serial Input Multiplying DAC

Analog Devices 

AD5441

Preliminary Technical Data

SRI

D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

CLK

tLD1

LD

SRI

CLK

LD

FS

VOUT

ZS

tASB

DATA LOADED MSB(D11) FIRST

Dxx

tDS tDH

tCL

tCH

tLD

tS

Figure 5. Timing Diagram

DAC REGISTER LOAD

±1LSB

ERROR BAND

Table 4. Control-Logic Truth Table

CLK LD

↑1

H

H or L L

L

↑1

1 ↑ equals positive logic transition.

Serial Shift Register Function

Shift-register-data advanced one bit

No effect

No effect

DAC Register Function

Latched

Updated with current shift register contents

Latched all 12 bits

Rev. PrA | Page 6 of 16

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