HYB39S256160T-8B 查看數據表（PDF） - Infineon Technologies
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HYB39S256160T-8B Datasheet PDF : 46 Pages
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HYB39S256400/800/160T
256MBit Synchronous DRAM
Address Input for Mode Set (Mode Register Operation)
BA1BA0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Address Bus (Ax)
Operation Mode
CAS Latency BT Burst Length
Mode Register (Mx)
Operation Mode
M9
Mode
0 burst read / burst write
1 burst read / single write
Burst Type
M3
Type
0
Sequential
1
Interleave
CAS Latency
M6 M5 M4
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Latency
Reserved
Reserved
2
3
4
Reserved
Burst Length
Length
M2 M1 M0
Sequential Interleave
0
0
0
1
1
0
0
1
2
2
0
1
0
4
4
0
1
1
8
8
1
0
0
1
0
1
Reserved Reserved
1
1
0
1
1
1
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