AT24C512C 查看數據表（PDF） - Atmel Corporation

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AT24C512C

I²C-Compatiable (2-wire) Serial EEPROM 512-Kbit (65,536 x 8)

Atmel Corporation 

Figure 6-2. Bus Timing

SCL: Serial Clock, SDA: Serial Data I/O

SCL

tF

tLOW

tHIGH

tLOW

SDA IN

tSU.STA

tHD.STA

tHD.DAT

tSU.DAT

tAA

tDH

SDA OUT

tR

tSU.STO

tBUF

Figure 6-3. Write Cycle Timing

SCL: Serial Clock, SDA: Serial Data I/O

SCL

SDA

8th Bit

ACK

WORDN

Stop

Condition

(1)

tWR

Start

Condition

Notes: 1. The write cycle time, tWR, is the time from a valid Stop condition of a write sequence to the end of the internal

clear/write cycle.

Atmel AT24C512C [DATASHEET]

7

8720C–SEEPR–7/12

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