AV3168 查看數據表（PDF） - Unspecified

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AV3168

Video Encoder

Unspecified 

AV3168/69

PIN DESCRIPTIONS

Pin Name Pin # Type

Description

DIGITAL VIDEO INPUT

PD<7 -0>

11-16

18-19

I Multiplexed Cb, Y, and Cr digital video input bus.

HSYN

21

I/O In Slave Mode (MSTR pin is low) Horizontal Synch input. In Master

Mode (MSTR pin is high) Horizontal Synch output.

VSYN

20

I/O In slave mode (MSTR pin is low) Vertical Sync input. In master mode

Vertical Sync output.

VIDEO CONTROL SIGNALS

MSTR

3

I

CPNT

27

I

PDEN

28

1

Master Mode;

If this pin is high, the chip outputs horizontal and vertical sync signals.

Otherwise it receives both horizontal and vertical sync signals.

Select either component or composite video output.

0: Simultaneous Composite and S-Video output.

1: Component video output either RGB or YCbCr determined by the

register CR0[5:4].

Pedestal enable pins.

When this pin is high 7.5 IRE is added for the NTSC composite analog

output.

VIDEO ANALOG OUTPUT, REFERENCE AND COMPENSATION

CVBS

35

O Analog video output

Determined by the state of CPNT pin and CR0[5:4]

CPNT CR0[5] CR0 [4]

--- 0 ---- X------ X: ---Composite video output

--- 1----- X------ 0: --- Cr output in YCbCr component mode

--- 1 ---0 0------X: --- 1111111111- ::

--- 1------1------ 1: ----Blue color output in RGB mode

Y

31

O Analog video output

Determined by the state of CPNT pin and CR0[5:4]

CPNT CR0[5] CR0 [4]

--- 0 ----- X----- X: ---S-Video Y output.

--i 1------ X---- - 0: ---Y output in YCbCr component mode

--- 1 ---0 0------X: -- 1111111111- ::

- i 1 ----- 1--- -- 1: - -R color output in RGB mode

6-24

January 4, 2001

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