BD9011EKN 查看數據表（PDF） - ROHM Semiconductor

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BD9011EKN

Dual-output, high voltage, high-efficiency step-down Switching Regulator (Controller type)

ROHM Semiconductor 

When electrolytic or other high-ESR output capacitors are used:

Phase compensation is relatively simple for applications employing high-ESR output capacitors (on the order of several

Ω). In DC/DC converter applications, where LC resonance circuits are always incorporated, the phase margin at these

locations is -180°. However, wherever ESR is present, a 90° phase lead is generated, limiting the net phase margin to -90°

in the presence of ESR. Since the desired phase margin is in a range less than 150°, this is a highly advantageous

approach in terms of the phase margin. However, it also has the drawback of increasing output voltage ripple components.

③ LC resonance circuit

Vcc

④ ESR connected

Vcc

Vo

L

C

Fig-28

Vo

L

RESR

C

Fig-29

1

fr = 2π√LC [Hz]

Resonance point phase margin -180°

resonance point1

fr = 2π√LC

[Hz]：Resonance Point

1

fESR = 2πRESRC [Hz] :Zero

-90°:Pole

Since ESR changes the phase characteristics, only one phase lead need be provided for high-ESR applications. Please choose

one of the following methods to add the phase lead.

⑤ Add C to feedback resistor

Vo

R1

C1

C2

FB

A

R2

COMP

⑥ Add R3 to aggregator

Vo

R1

R3 C2

FB

A

R2

COMP

Fig-30

Fig-31

Phase lead fz = 1

[Hz]

2πC1R1

Phase lead fz =

1

[Hz]

2πC2R3

Set the phase lead frequency close to the LC resonance frequency in order to cancel the LC resonance.

When using ceramic, OS-CON, or other low-ESR capacitors for the output capacitor:

Where low-ESR (on the order of tens of mΩ) output capacitors are employed, a two phase-lead insertion scheme is

required, but this is different from the approach described in figure ③~⑥, since in this case the LC resonance gives rise

to a 180° phase margin/delay. Here, a phase compensation method such as that shown in figure ⑦ below can be

implemented.

⑦ Phase compensation provided by secondary (dual) phase lead

Vo

R1

R2

C1 R3 C2

FB

A

COMP

Phase lead fz1 =

1

[Hz]

2πR1C1

Phase lead fz2 =

1

[Hz]

2πR3C2

LC resonance frequency fr =

1

[Hz]

2π√LC

Fig-32

Once the phase-lead frequency is determined, it should be set close to the LC resonance frequency.

This technique simplifies the phase topology of the DCDC Converter. Therefore, it might need a certain amount

of trial-and-error process. There are many factors(The PCB board layout, Output Current, etc.)that can affect

the DCDC characteristics. Please verify and confirm using practical applications.

11/28

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