A386DX 查看數據表（PDF） - Intel

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A386DX

32-BIT CHMOS MICROPROCESSOR WITH INTEGRATED MEMORY MANAGEMENT

Intel 

Intel386TM DX MICROPROCESSOR

The I O ports are accessed via the IN and OUT I O

instructions with the port address supplied as an

immediate 8-bit constant in the instruction or in the

DX register All 8- and 16-bit port addresses are zero

extended on the upper address lines The I O in-

structions cause the M IO pin to be driven low

I O port addresses 00F8H through 00FFH are re-

served for use by Intel

2 9 INTERRUPTS

2 9 1 Interrupts and Exceptions

Interrupts and exceptions alter the normal program

flow in order to handle external events to report

errors or exceptional conditions The difference be-

tween interrupts and exceptions is that interrupts are

used to handle asynchronous external events while

exceptions handle instruction faults Although a pro-

gram can generate a software interrupt via an INT N

instruction the processor treats software interrupts

as exceptions

Hardware interrupts occur as the result of an exter-

nal event and are classified into two types maskable

or non-maskable Interrupts are serviced after the

execution of the current instruction After the inter-

rupt handler is finished servicing the interrupt exe-

cution proceeds with the instruction immediately af-

ter the interrupted instruction Sections 2 9 3 and

2 9 4 discuss the differences between Maskable and

Non-Maskable interrupts

Exceptions are classified as faults traps or aborts

depending on the way they are reported and wheth-

er or not restart of the instruction causing the excep-

tion is supported Faults are exceptions that are de-

tected and serviced before the execution of the

faulting instruction A fault would occur in a virtual

memory system when the processor referenced a

page or a segment which was not present The oper-

ating system would fetch the page or segment from

disk and then the Intel386 DX would restart the in-

struction Traps are exceptions that are reported im-

mediately after the execution of the instruction

which caused the problem User defined interrupts

are examples of traps Aborts are exceptions which

do not permit the precise location of the instruction

causing the exception to be determined Aborts are

used to report severe errors such as a hardware

error or illegal values in system tables

Thus when an interrupt service routine has been

completed execution proceeds from the instruction

immediately following the interrupted instruction On

the other hand the return address from an excep-

tion fault routine will always point at the instruction

causing the exception and include any leading in-

struction prefixes Table 2-5 summarizes the possi-

ble interrupts for the Intel386 DX and shows where

the return address points

The Intel386 DX has the ability to handle up to 256

different interrupts exceptions In order to service

the interrupts a table with up to 256 interrupt vec-

tors must be defined The interrupt vectors are sim-

ply pointers to the appropriate interrupt service rou-

tine In Real Mode (see section 3 1) the vectors are

4 byte quantities a Code Segment plus a 16-bit off-

set in Protected Mode the interrupt vectors are 8

byte quantities which are put in an Interrupt Descrip-

tor Table (see section 4 1) Of the 256 possible inter-

rupts 32 are reserved for use by Intel the remaining

224 are free to be used by the system designer

2 9 2 Interrupt Processing

When an interrupt occurs the following actions hap-

pen First the current program address and the

Flags are saved on the stack to allow resumption of

the interrupted program Next an 8-bit vector is sup-

plied to the Intel386 DX which identifies the appro-

priate entry in the interrupt table The table contains

the starting address of the interrupt service routine

Then the user supplied interrupt service routine is

executed Finally when an IRET instruction is exe-

cuted the old processor state is restored and pro-

gram execution resumes at the appropriate instruc-

tion

The 8-bit interrupt vector is supplied to the Intel386

DX in several different ways exceptions supply the

interrupt vector internally software INT instructions

contain or imply the vector maskable hardware in-

terrupts supply the 8-bit vector via the interrupt ac-

knowledge bus sequence Non-Maskable hardware

interrupts are assigned to interrupt vector 2

2 9 3 Maskable Interrupt

Maskable interrupts are the most common way used

by the Intel386 DX to respond to asynchronous ex-

ternal hardware events A hardware interrupt occurs

when the INTR is pulled high and the Interrupt Flag

bit (IF) is enabled The processor only responds to

interrupts between instructions (REPeat String in-

structions have an ‘‘interrupt window’’ between

memory moves which allows interrupts during long

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