E602204_HD64413A 查看數據表（PDF） - Mitsumi

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E602204_HD64413A

SuperH RISC engine Peripheral LSI

Mitsumi 

• Allocating the UGM in the CPU’s memory space

A CPU interface circuit is incorporated to provide a unified interface. The UGM is allocated

in the CPU’s memory space (see figure 1.3). This simplifies the UGM management by the

CPU.

SDRAM

2SD

UGM (Unified Graphics Memory)

Frame buffer 0

Frame buffer 1

Binary work area

Binary/multi-valued

source

Display list

The CPU can access the UGM directly via the Q2SD

Figure 1.3 Unified System Bus Interface

Rev. 2.0, 09/02, page 3 of 366

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