E602204_HD64413A 查看數據表（PDF） - Mitsumi

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E602204_HD64413A

SuperH RISC engine Peripheral LSI

Mitsumi 

Table 1.1 Summary of Q2SD Functions (cont)

Item

Function/Performance

System

SH Command/

inter- data transfer

face

DMA transfer (single address, dual address), or

performed by SuperH

YUV → RGB

conversion

16-bit input, 4:2:2 (8 bits each for Y, U, V)

16-bit output (R: 5, G: 6, B: 5 bits)

∆YUV → RGB

conversion

8-bit input (4 bits each for d-Y, d-U, d-V)

16-bit output (R: 5, G: 6, B: 5 bits)

Interrupt output TV sync signal error flag, frame flag, DMA flag,

command error flag, vertical blanking flag, trap flag,

command suspend flag, drawing break flag

SuperH

supported

Can be allocated to the SRAM area of the SuperH with

3.3-V power supply.

UGM

32/16-bit-

interface bus-width

SDRAM

Minimum 16 Mbits (choice of one 16-Mbit (×16)

memory, two parallel 16-Mbit (×16) memories, one 64-

Mbit (×16) memory, or one 64-Mbit (×32) memory)

DAC

Analog RGB 6-bit resolution for each of R, G, and B (8-bit resolution

output

for each of R, G, and B for video stored in UGM in

YCbCr format)

Process/package

0.35-µ CMOS/176-pin LQFP

Power supply voltage/temperature

range

3.3 V ± 0.3 V/0°C to 70°C

(Details of a −40°C to 85°C special-specification model

are also available from Hitachi sales representatives)

1.3 Block Diagram

Figure 1.10 shows a block diagram of the Q2SD. The functions of the various blocks in figure

1.10 are as follows.

• CPU interface unit

Performs UGM access by the CPU, Q2SD on-chip register accesses by the CPU, and UGM

write access by the external DMAC. Converts input data ∆YUV (260,000 colors) or YUV

(260,000 colors) to RGB data (60,000 colors), and stores it in the UGM. Interrupts are

output.

• UGM interface unit

Controls the connection relating to the SDRAM that is used for the UGM.

• Chip manager

Controls the operation of each unit in the UGM architecture.

Rev. 2.0, 09/02, page 10 of 366

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