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EDE1108AJBG-1 查看數據表(PDF) - Elpida Memory, Inc

零件编号
产品描述 (功能)
生产厂家
EDE1108AJBG-1
Elpida
Elpida Memory, Inc Elpida
EDE1108AJBG-1 Datasheet PDF : 74 Pages
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EDE1108AJBG-1, EDE1116AJBG-1
Clock Jitter
Frequency (Mbps)
1066
Parameter
Symbol
min.
max.
Unit
Average clock period
tCK (avg)
1875
7500
ps
Clock period jitter
tJIT (per)
90
90
ps
Clock period jitter during DLL locking period tJIT (per, lck) 80
80
ps
Cycle to cycle period jitter
tJIT (cc)
180
ps
Cycle to cycle clock period jitter during DLL
locking period
tJIT (cc, lck)
160
ps
Cumulative error across 2 cycles
tERR (2per)
132
132
ps
Cumulative error across 3 cycles
tERR (3per)
157
157
ps
Cumulative error across 4 cycles
tERR (4per)
175
175
ps
Cumulative error across 5 cycles
tERR (5per)
188
188
Cumulative error across
n=6,7,8,9,10 cycles
tERR
(6-10per)
250
250
Cumulative error across
n=11, 12,…49,50 cycles
tERR
(11-50per)
425
425
Average high pulse width
tCH (avg)
0.48
0.52
ps
ps
ps
tCK (avg)
Average low pulse width
tCL (avg)
0.48
0.52
tCK (avg)
Duty cycle jitter
tJIT (duty)
75
75
ps
Notes: 1. tCK (avg) is calculated as the average clock period across any consecutive 200cycle window.
Notes
1
5
5
6
6
7
7
7
7
7
7
2
3
4
tCK (avg
)
=
N
tCKj
N
j =1
N = 200
2. tCH (avg) is defined as the average high pulse width, as calculated across any consecutive 200 high
pulses.
tCH (avg
)
=
N
tCHj
(N × tCK(avg ))
j =1
N = 200
3. tCL (avg) is defined as the average low pulse width, as calculated across any consecutive 200 low pulses.
tCL(avg
)
=
N
tCLj
(N × tCK(avg ))
j =1
N = 200
4. tJIT (duty) is defined as the cumulative set of tCH jitter and tCL jitter. tCH jitter is the largest deviation of
any single tCH from tCH (avg). tCL jitter is the largest deviation of any single tCL from tCL (avg).
tJIT (duty) is not subject to production test.
tJIT (duty) = Min./Max. of {tJIT (CH), tJIT (CL)}, where:
tJIT (CH) = {tCHj- tCH (avg) where j = 1 to 200}
tJIT (CL) = {tCLj tCL (avg) where j = 1 to 200}
Data Sheet E1733E31 (Ver.3.1)
18

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