HSD4M64D4B 查看數據表（PDF） - Hanbit Electronics Co.,Ltd

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HSD4M64D4B

Synchronous DRAM Module 32Mbyte (4Mx64-Bit), DIMM, 4Banks, 4K Ref., 3.3V

Hanbit Electronics Co.,Ltd 

HANBit

FUNCTIONAL BLOCK DIAGRAM

HSD4M64D4B

DQ0-63

CKE0

/CAS

/RAS

/CS0

/CS2

/WE

A0 – A11

BA0-1

CKE

CAS

RAS

CE WE

U1

CLK

DQ0-15

DQM0

A0-A11 BA0-1 DQM1

CKE

CAS

RAS

CE WE

U2

CLK

DQ16-31

DQM2

A0-A11 BA0-1 DQM3

CKE

CAS

RAS

CE WE

U3

CLK

DQ32-47

DQM4

A0-A11 BA0-1 DQM5

CKE

CAS

RAS

CE WE

CLK

U4

DQ48-63

DQM6

A0-A11 BA0-1 DQM7

CLKA

DQM0

DQM1

DQM2

DQM3

CLKC

DQM4

DQM5

DQM6

DQM7

Vcc

Vss

PIN FUNCTION DESCRIPTION

Two 0.1uF Capacitors

per each SDRAM

Pin

Name

CLK

System clock

/CE

Chip enable

CKE

Clock enable

URL:www.hbe.co.kr

REV.1.0 (August.2002)

Input Function

Active on the positive going edge to sample all inputs.

Disables or enables device operation by masking or enabling all inputs except

CLK, CKE and DQM

Masks system clock to freeze operation from the next clock cycle.

CKE should be enabled at least one cycle prior to new command.

Disable input buffers for power down in standby.

CKE should be enabled 1CLK+tSS prior to valid command.

-3-

HANBit Electronics Co.,Ltd

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