HSD4M64D4B 查看數據表（PDF） - Hanbit Electronics Co.,Ltd
零件编号
产品描述 (功能)
生产厂家
HSD4M64D4B
Hanbit Electronics Co.,Ltd
HSD4M64D4B Datasheet PDF : 10 Pages
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HANBit
HSD4M64D4B
CLK low pulse width
tCL
3
3
3
ns
3
Input setup time
tSS
2
2
2
ns
3
Input hold time
tSH
1
1
1
ns
3
CLK to output in Low-Z
tSLZ
1
1
1
ns
3
CLK to output CAS
in Hi-Z
latency=3
tSHZ
CAS
latency=2
6
6
6
6
6
ns
2
7
ns
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, ie., [(tr + tf)/2-1]ns should be added to
the parameter.
SIMPLIFIED TRUTH TABLE
COMMAND
CKE
n-1
Register Mode register set
H
Auto refresh
H
Entry
Refresh Self
refresh Exit
L
CKE
N
X
H
L
H
Bank active & row addr.
H
X
Auto precharge
Read &
disable
column
H
X
Auto precharge
address
disable
Auto precharge
Write &
disable
column
H
X
address Auto precharge
disable
Burst Stop
H
X
Bank selection
Precharge
All banks
H
X
Clock suspend or Entry
active power down
Exit
H
L
L
H
Precharge power
down mode
Entry
Exit
H
L
L
H
DQM
H
No operation command
H
X
URL:www.hbe.co.kr
REV.1.0 (August.2002)
/C
S
/R
A
S
/C
A
S
/W
E
D
Q
M
BA
0,1
A10/
AP
A11
A9~A0
NOTE
L L LL X
OP code
1,2
3
L L LH X
X
3
L H HH
3
X
X
H X XX
3
L L HH X
V
Row address
L H LH X
V
L
Column
4
Address
H
(A0 ~ A7) 4,5
L HLL X
V
Column
L
Address
4
(A0 ~ A7)
H
4,5
L L HL X
X
6
V
L
L L HL X
X
X
H
H X XX
X
L V VV
X
X X XX X
H X XX
X
L H HH
X
H X XX
X
L V VV
X
V
X
7
HX X
X
X
X
LH H
H
(V=Valid, X=Don't care, H=Logic high, L=Logic low)
-8-
HANBit Electronics Co.,Ltd
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