DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

HT48CA5 查看數據表(PDF) - Holtek Semiconductor

零件编号
产品描述 (功能)
生产厂家
HT48CA5
Holtek
Holtek Semiconductor Holtek
HT48CA5 Datasheet PDF : 38 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
After a chip reset, these input/output lines stay at high
levels (pull-high options) or floating state (non-pull-high
options). Each bit of these input/output latches can be
set or cleared by ²SET [m].i² (m=12H, 14H, 16H or 1CH)
instructions. Some instructions first input data and then
follow the output operations. For example, ²SET [m].i²,
²CLR [m].i², ²CPLA [m]² read the entire port states into
the CPU, execute the defined operations (bit-operation),
and then write the results back to the latches or the ac-
cumulator.
Each line of port A has the capability of waking-up the
device. The highest 2 bits of port C and 7 bits of port F
are not physically implemented; on reading them a ²0² is
returned whereas writing then results in a no-operation.
Pull-high resistors of each port are decided by a option
bit.
The PB0 is pin-shared with PFD signal, respectively. If
the PFD option is selected, the output signal in output
mode of PB0 will be the PFD signal. The input mode al-
ways remain its original functions. The PF0 and PC0 are
pin-shared with INT and TMR0. The INT signal is di-
rectly connected to PF0. The PFD output signal (in out-
put mode) are controlled by the PB0 data register only.
The truth table of PB0/PFD is listed below.
The truth table of PB0/PFD is as shown.
PBC (15H) Bit0
I
PB0/PFD Option x
PB0 (14H) Bit0
x
PB0 Pad Status
I
O
O
O
PB0 PFD PFD
D
0
1
D
0
PFD
Note: I: Input; O: Output; D: Data
Bank Pointer
There is a bank pointer used to control the program flow
to go to any banks. A bank contains 8K´16 address
space. The contents of bank pointer are load into pro-
gram counter when the JMP or CALL instruction is exe-
cuted. The program counter is a 16-bit register whose
contents are used to specify the executed instruction
addresses.
HT48RA5/HT48CA5
When calling a subroutine or an interrupt event occur-
ring, the contents of the program counter are save into
stack registers. If a returning from subroutine occurs,
the contents of the program counter will restore from
stack registers.
BP.7 BP.6 BP.5
0
0
0
0
0
1
0
1
0
0
1
1
1
0
1
ROM
Bank0
Bank1
Bank2
Bank3
Bank4
Address
0000H~1FFFH
2000H~3FFFH
4000H~5FFFH
6000H~7FFFH
8000H~9FFFH
Bank Pointer
Low Voltage Reset - LVR
The microcontroller provides low voltage reset circuit in
order to monitor the supply voltage of the device. If the
supply voltage of the device is within the range
0.9V~VLVR, such as changing a battery, the LVR will au-
tomatically reset the device internally.
The LVR includes the following specifications:
· The low voltage (0.9V~VLVR) has to remain in their
original state to exceed 1ms. If the low voltage state
does not exceed 1ms, the LVR will ignore it and do not
perform a reset function.
· The LVR uses the ²OR² function with the external
RES signal to perform chip reset.
The relationship between VDD and VLVR is shown below.
V DD
5 .5 V
V LV R
1 .8 V
0 .9 V
Rev. 1.40
17
May 22, 2009

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]