CS853014BGLFT 查看數據表（PDF） - Integrated Device Technology
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CS853014BGLFT
Integrated Device Technology
CS853014BGLFT Datasheet PDF : 19 Pages
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ICS853014
LOW SKEW, 1-TO-5, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
Function Tables
Table 3A. Control Input Function Table
Inputs
EN
CLK_SEL
1
0
1
1
0
0
0
1
Selected Source
PCLK0, PCLK0
PCLK1, PCLK1
PCLK2, PCLK2
PCLK3, PCLK3
Outputs
Q0:Q4
Q0:Q4
Disabled; Low
Disabled; High
Disabled; Low
Disabled; High
Enabled
Enabled
Enabled
Enabled
After EN switches, the clock outputs are disabled or enabled following a falling input clock edge as shown in Figure 1.
In the active mode, the state of the outputs are a function of the PCLK0/PCLK0 and PCLK1/PCLK1 inputs as described in Table 3B.
PCLK0, PCLK1
PCLK0, PCLK1
Disabled
Enabled
EN
Q0:Q4
Q0:Q4
Figure 1. EN Timing Diagram
Table 3B. Clock Input Function Table
Inputs
PCLK0 or PCLK1
PCLK0 or PCLK1
0
1
1
0
0
Biased; NOTE 1
1
Biased; NOTE 1
Biased; NOTE 1
0
Biased; NOTE 1
1
Outputs
Q0:Q4
Q0:Q4
LOW
HIGH
HIGH
LOW
LOW
HIGH
HIGH
LOW
HIGH
LOW
LOW
HIGH
Input to Output Mode
Differential to Differential
Differential to Differential
Single-Ended to Differential
Single-Ended to Differential
Single-Ended to Differential
Single-Ended to Differential
Polarity
Non-Inverting
Non-Inverting
Non-Inverting
Non-Inverting
Inverting
Inverting
IDT™ / ICS™ 2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
3
ICS853014BG REV. DNOVEMBER 12, 2007
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