ICS932S202 查看數據表（PDF） - Integrated Circuit Systems

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ICS932S202

Frequency Timing Generator for Differential PIII Type Dual-CPU Systems

Integrated Circuit Systems 

ICS932S202

Group Offset

Group

Offset

Measurement Loads

Measure Points

CPU to 3V66 0.8 to 1.8ns CPU leads CPU @ 20pF, 3V66 @ 30pF CPU @1.25V, 3V66 @ 1.5V

CPU to PCI 0 to 1.5ns CPU leads CPU @ 20pF, PCI @ 30pF

CPU @ 1.25V, PCI @ 1.5V

CPU to IOAPIC 1.5 to 4.0ns CPU leads CPU @ 20pF, IOAPIC @ 20pF CPU @ 1.25V, IOAPIC @ 1.25V

Note: 1. All offsets are to be measured at rising edges.

Electrical Characteristics - CPUCLK

TA = 0 - 70°C; VDD = 3.3 V +/-5%, VDDL = 2.5V +/- 5 %; CL = 20 pF (unless otherwise stated).

PARAMETER

SYMBOL

CONDITIONS

MIN TYP

Output High Voltage

Output Low Voltage

Output High Current

Output Low Current

Rise Time

Fall Time

Duty Cycle

Skew

VOH2B

VOL2B

IOH2B

IOL2B

tr2B1

tf2B1

dt2B1

Cpu0:1

CPU0:3

IOH = -12 mA

IOL = 12 mA

VOH = 1.7 V

VOL = 0.7 V

VOL = 0.4 V, VOH = 2.0 V

VOH = 2.0 V, VOL = 0.4 V

VT = 1.25 V

VT=1.25 to 1.5V @ all frequency

VT=1.25 to 1.5V @ 66MHz

VT=1.25 to 1.5V @ 100MHz

2

2.3

0.3

-35

19

26

0.4 0.73

0.4 0.76

45 50.6

-2

140

165

VT=1.25 to 1.5V @ 133MHz

155

VT=1.25 to 1.5V @ 200MHz

70

Jitter, Cycle-to-cycle tjcyc-cyc2B1 VT = 1.25 V

108

1Guaranteed by design, not 100% tested in production.

MAX

0.4

-19

0.9

0.9

55

175

175

175

175

175

250

UNITS

V

V

mA

mA

ns

ns

%

ps

ps

ps

ps

ps

ps

0600A—08/04/03

7

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