IS25C128A 查看數據表（PDF） - Integrated Silicon Solution

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IS25C128A

128K-bit SPI SERIAL ELECTRICALLY ERASABLE PROM

Integrated Silicon Solution 

IS25C128A

Figure 4. RDSR Timing

CS

SK

Din

Instruction

DATA OUT

Dout

76 54321 0

Note: The "Don't Care" bit of the op-code is set to 0 in the above instruction for consistency.

Figure 5. WRSR Timing

CS

SK

DATA IN

Din

Instruction

76 54321 0

Dout

Note: The "Don't Care" bit of the op-code is set to 0 in the above instruction for consistency.

Figure 6. READ Timing

CS

SK

Instruction

Din

BYTE Address

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

DATA OUT

Dout

76 543210

Note: The "Don't Care" bit of the op-code is set to 0 in the above instruction for consistency.

Integrated Silicon Solution, Inc.

11

AdvancedInformation Rev. 00E

11/25/08

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