IS61NSCS25672 查看數據表（PDF） - Integrated Silicon Solution

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IS61NSCS25672

ΣRAM 256K x 72, 512K x 36 18Mb Synchronous SRAM

Integrated Silicon Solution 

IS61NSCS25672

IS61NSCS51236

ISSI ®

Output Driver Impedance Control

SigmaRAMs may be supplied with either selectable (high) impedance output drivers. The ZQ pin of SigmaRAMs supplied

with selectable impedance drivers, allows selection between ΣRAM nominal drive strength (ZQ low) for multi-drop bus

applications and low drive strength (ZQ floating or high) point-to-point applications. The impedance of the data and clock

output drivers in these devices can be controlled via the static input ZQ. When ZQ is tied "low", output driver impedance

is set to ~25 Ω. When ZQ is tied "high" or left unconnected, output driver impedeance is set to ~50Ω. See the DC Electrical

Characteristics section for further information. The SRAM requires 32K cycles of power-up time after VCC reaches its

operating range.

Output Driver Characteristics - TBD

12

Integrated Silicon Solution, Inc. — 1-800-379-4774

ADVANCE INFORMATION Rev. 00A

06/19/01

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