KS0072 查看數據表（PDF） - Samsung
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KS0072 Datasheet PDF : 32 Pages
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KS0072
PRELIMINARY SPECIFICATION
DOT MATRIX LCD CONTROLLER & DRIVER
Table 3. Instruction Table
Instruction Code
Instruction
RS
R/W
DB
7
DB
6
DB
5
DB
4
DB
3
DB
2
DB
1
DB
0
Description
Test Mode
Device test mode (When 4-bit
00 0
0
0
0
0
0
0
0 interface mode) No operation
(When 8-bit interface mode)
Write “20H” to DDRAM and
Clear Display
00 0
0
0
0
0
0
0
1 set DDRAM address to “20H”
from AC.
Set DDRAM address to “00H”
from AC and return cursor to its
Return Home
00 0
0
0
0
0
0
1
* original position if shifted.
The contents of DDRAM are
not changed.
Entry Mode Set 0 0 0
0
0
0
0
1
1/D
S
Assign cursor moving direction
and enable entire dispaly shift.
Display ON/
All display(D), cursor(C), and
OFF
00 0
0
0
0
1
D
C
B blinking of cursor position char-
Control
acter on/off control bit(B).
Cursor or Dis-
Cursor and Display shift and
play
00 0
0
0
1
S/C
R/L
*
* their direction control without
Shift
changing DDRAM data.
Function Set
00 0
0
1
DL
A
Set interface data length(DL),
*
DDRAM addressing mode (A)
M1 M0 and COM/SEG output pat-
tern(M0,M1).
Set CGRAM
Address
00 0
1
*
Set CGRAM address in
AC4 AC3 AC2 AC1 AC0
address counter.
Set DDRAM
Address
0
0
1
Set DDRAM address in
AC6 AC5 AC4 AC3 AC2 AC1 AC0 address counter .
Read
DDRAM
Busty
flag and
Address
CGRAM
0
AC6 AC6 AC4 AC3 AC2 AC1 AC0 Whether in internal operation
1 BF
*
or not can be known by reading
*
AC4 AC3 AC2 AC1 AC0 BF. The contents of address
counter can also be read.
Write
DDRAM
D7 D6 D5 D4 D3 D2 D1 D0 Write data into internal RAM
Data
10
to RAM CGRAM
*
*
*
(DDRAM/CGRAM).
D4
D3
D2
D1 D0
Read
DDRAM
D7 D6 D5 D4 D3 D2 D1 D0 Read data from internal RAM
Data
from
RAM
1
CGRAM
1
*
*
(DDRAM/CGRAM).
*
D4 D3 D2 D1 D0
Execution
time
(fosc=270
kHZ)
-
629µs
629µs
37µs
37µs
37µs
37µs
37µs
37µs
0µs
43µs
43µs
NOTE : the asterisk means “don’t care”.
LDI-97-D001
11
97-10-23
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