L6566BH 查看數據表（PDF） - STMicroelectronics

零件编号

产品描述 (功能)

生产厂家

L6566BH

Multimode controller for SMPS

STMicroelectronics 

Application information

Figure 10. Operation of ZCD, triggering and oscillator blocks (QR option active)

L6566BH

ZCD

(pin 11)

100 mV

50 mV

Oscillator

ramp

ZCD

blanking

time

Arm/Trigger

armed

trigger

ON-enable

PWM latch

Set

PWM latch

Reset

GD

(pin 4)

a) full load

ZCD

(pin 11)

100 mV

50 mV

Oscillator

ramp

ZCD

blanking

time

Arm/Trigger

ON-enable

PWM latch

Set

PWM latch

Reset

GD

(pin 4)

b) light load

ZCD

(pin 11)

100 mV

50 mV

Oscillator

ramp

ZCD

blanking

time

Arm/Trigger

ON-enable

PWM latch

Set

PWM latch

Reset

GD

(pin 4)

c) start-up

AM11486v1

5.3

Note:

Burst-mode operation at no load or very light load

When the voltage at the COMP pin (9) falls 20 mV below a threshold fixed internally at a

value, VCOMPBM, depending on the selected operating mode, the L6566BH is disabled with

the MOSFET kept in OFF-state and its consumption reduced to a lower value to minimize

VCC capacitor discharge.

The control voltage now increases as a result of the feedback reaction to the energy delivery

stop (the output voltage is slowly decaying), the threshold is exceeded and the device

restarts switching again. In this way the converter works in burst-mode with a nearly

constant peak current defined by the internal disable level. A load decrease then causes a

frequency reduction, which can go down even to few hundred hertz, therefore minimizing all

frequency-related losses and making it easier to comply with energy saving regulations.

This kind of operation, shown in the timing diagrams of Figure 11 along with the others

previously described, is noise-free since the peak current is low.

If it is necessary to decrease the intervention threshold of the burst-mode operation, this can

be done by adding a small DC offset on the current sense pin as shown in Figure 12.

The offset reduces the available dynamics of the current signal; thereby, the value of the

sense resistor must be determined taking this offset into account.

22/51

Doc ID 16610 Rev 2

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