AD1377JD(RevD) 查看數據表（PDF） - Analog Devices
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AD1377JD Datasheet PDF : 12 Pages
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AD1376/AD1377
Table 4. Input Scaling Connections
Input Signal Line
Output Code
Connect Pin 26 to
±10 V
COB
Pin 271
±5 V
COB
Pin 271
±2.5 V
COB
Pin 271
0 V to +5 V
CSB
Pin 22
0 V to +10 V
CSB
Pin 22
0 V to +20 V
CSB
Pin 22
1 Pin 27 is extremely sensitive to noise and should be guarded by ANALOG COMMON.
Connect Pin 24 to
Input Signal
Open
Pin 271
Pin 271
Open
Input Signal
Connect Input Signal to
Pin 24
Pin 25
Pin 25
Pin 25
Pin 25
Pin 24
10V SPAN
25
R2
3.75kΩ
24
20V SPAN
COMP IN 27
R1
3.75kΩ
FROM DAC
TO
SAR
BIPOLAR
OFFSET
26
ANALOG 22
COMMON
7.5kΩ
VREF COMPARATOR
Figure 10. Input Scaling Circuit
CALIBRATION (14-BIT RESOLUTION EXAMPLES)
External zero adjustment and gain adjustment potentiometers,
connected as shown in Figure 5 and Figure 6, are used for
device calibration. To prevent interaction of these two
adjustments, zero is always adjusted first and then gain. Zero is
adjusted with the analog input near the most negative end of the
analog range (0 for unipolar and minus full scale for bipolar
input ranges). Gain is adjusted with the analog input near the
most positive end of the analog range.
0 V to 10 V Range
Set analog input to +1 LSB14 = 0.00061 V. Adjust zero for digital
output = 11111111111110. Zero is now calibrated. Set analog
input to +FSR − 2 LSB = 9.99878 V. Adjust gain for
00000000000001 digital output code; full scale (gain) is now
calibrated. Half-scale calibration check: set analog input to
5.00000 V; digital output code should be 01111111111111.
−10 V to +10 V Range
Set analog input to −9.99878 V; adjust zero for 1111111111110
digital output (complementary offset binary) code. Set analog
input to 9.99756 V; adjust gain for 00000000000001 digital
output (complementary offset binary) code. Half-scale
calibration check: set analog input to 0.00000 V; digital output
(complementary offset binary) code should be 01111111111111.
+15V
10kΩ
300kΩ
TO
100kΩ
GAIN
ADJ
–15V
29
0.01µF
AD1376/
AD1377
REF
CONTROL
16-BIT SUCCESSIVE
APPROMIXATION REGISTER
KEEP/
REJECT
16-BIT DAC
+15V
28
+
1µF
22
+
1µF
–15V
21
7.5kΩ
A
IOS = 1.3mA
30 19
23
26
IIN
27 24 25
NOTE:
ANALOG (
+5V
+1µF
+15V
1.8MΩ
10kΩ
TO
100kΩ
ZERO
ADJ
–15V
eIN
(0V TO +10V)
) AND DIGITAL ( ) GROUNDS ARE NOT TIED INTERNALLY AND MUST BE CONNECTED EXTERNALLY.
Figure 11. Analog and Power Connections
for Unipolar 0 V to 10 V Input Range
+15V
10kΩ
300kΩ
TO
100kΩ
GAIN
ADJ
–15V
29
0.01µF
AD1376/
AD1377
REF
CONTROL
16-BIT SUCCESSIVE
APPROMIXATION REGISTER
KEEP/
REJECT
16-BIT DAC
+15V
28
+
1µF
22
+
1µF
–15V
21
7.5kΩ
A
IOS = 1.3mA
30
19
23
26
IIN
27 24
25
NOTE:
ANALOG (
+5V
+1µF
+15V
1.8MΩ
10kΩ
TO
100kΩ
ZERO
ADJ
–15V
eIN
(–10V TO +10V)
) AND DIGITAL ( ) GROUNDS ARE NOT TIED INTERNALLY AND MUST BE CONNECTED EXTERNALLY
Figure 12. Analog and Power Connections
for Bipolar −10 V to +10 V Input Range
Other Ranges
Representative digital coding for 0 V to +10 V and −10 V to
+10 V ranges is given in the 0 V to 10 V Range section and
−10 V to +10 V Range section. Coding relationships and
calibration points for 0 V to +5 V, −2.5 V to +2.5 V, and −5 V to
+5 V ranges can be found by halving proportionally the
corresponding code equivalents listed for the 0 V to +10 V and
−10 V to +10 V ranges, respectively, as indicated in Table 5.
Rev. D | Page 8 of 12
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