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MB91314A 查看數據表(PDF) - Fujitsu

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MB91314A
Fujitsu
Fujitsu Fujitsu
MB91314A Datasheet PDF : 73 Pages
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MB91314A Series
HANDLING DEVICES
Preventing Latch-up
Latch-up may occur in a CMOS IC if a voltage greater than VDDE or VDDI, or less than VSS is applied to input and
output pins or if an above-rating voltage is applied between VDDE or VDDI pins and VSS pin. A latch-up, if it
occurs, significantly increases the power supply current and may cause thermal destruction of an element. When
you use a CMOS IC, be very careful not to exceed the maximum rating.
Treatment of Unused Input Pins
Do not leave an unused input pin open, since it may cause a malfunction. Handle by, for example, using a pull-
up or pull-down resistor.
About power supply pins
If more than one VDDE or VDDI or VSS pin exists, those that must be kept at the same potential are designed
to be connected to one other inside the device to prevent malfunctions such as latch-up. Be sure to connect the
pins to a power supply and ground external to the device to minimize undesired electromagnetic radiation,
prevent strobe signal malfunctions due to an increase in ground level, and conform to the total output current
rating. Given consideration to connecting the current supply source to VDDE or VDDI and VSS pin of the device
at the lowest impedance possible.
It is also recommended that a ceramic capacitor of around 0.1 µF be connected between VDDE or VDDI and
VSS pin at circuit points close to the device as a bypass capacitor.
About Crystal oscillator circuit
Noise near the X0, X1, X0A and X1A pins may cause the device to malfunction. Design the printed circuit board
so that X0, X1, X0A and X1A pins the crystal oscillator (or ceramic oscillator), and the bypass capacitor to ground
are located as close to the device as possible.
It is strongly recommended to design the PC board artwork with the X0, X1, X0A and X1A pins surrounded by
ground plane because stable operation can be expected with such a layout.
Please ask the crystal maker to evaluate the oscillational characteristics of the crystal and this device.
About Mode pins (MD0 to MD2)
These pins should be connected directly to VDDE or VSS pins. To prevent the device erroneously switching to
test mode due to noise, design the printed circuit board such that the distance between the mode pins and VDDE
or VSS pins is as short as possible and the connection impedance is low.
Operation at start-up
Always use the INIT pin to perform a setting initialization reset (INIT) after turning on the power.
Immediately after the power supply is turned on, hold the Low level input to the INIT pin for the stabilization wait
time required for the oscillator circuit to take the oscillation stabilization wait time for the oscillator circuit (For
INIT via the INIT pin, the oscillation stabilization wait time setting is initialized to the minimum value).
Source oscillation input at power on
When turning on the power, always input the clock for the duration of the oscillation stabilization delay time.
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