MCF51EM128 查看數據表（PDF） - Freescale Semiconductor
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MCF51EM128 Datasheet PDF : 54 Pages
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MCF51EM256 Series Configurations
VDDA/VSSA
VREFH/VREFL
VREFO
BKGD/MS/PTC2
Hardware CRC
BDM
Port C:
BKGD/MS
DBG
INTC
V1 ColdFire Core
with MAC
VDDA/VSSA
VREFH/VREFL
AD[20]
ADC 4
Port F:
AD[7], AD[19:17]
DADP/M[3]
trig[D]
sel[D][1:0]
PDB
trig[D:A]
sel[D:A][1:0] Port F:
EXTRIG
VDDA/VSSA
VREFH/VREFL
AD[20]
ADC 3
VDDA/VSSA
VREFH/VREFL
AD[20]
ADC 2
VDDA/VSSA
VREFH/VREFL
AD[20]
ADC 1
trig[C]
sel[C][1:0]
Port E, A:
AD[4], AD[13,9:8]
DADP/M[0]
trig[B]
sel[B][1:0]
Port F, B:
AD[6], AD[19:14]
DADP/M[2]
trig[A]
sel[A][1:0]
Port A:
AD[5], AD[13:10]
DADP/M[1]
VREF
2 Channel TPM
Port A:
TPMCH[1:0]
TPMCLK
16-Bit MTIM3
Port B, D:
TMRCLK[n]
COUT1
PRACMP1*
PRACMP2
COUT1
Port B:
SCI1 RX1
TX1
Port B, E:
SCI2 RX2
TX2
Port C,F:
SCI3
RX3
TX3
Port B:
IIC
SDA
SCL
Port B/C & D:
KBI 1 & 2 KBI1P[7:0]
KBI2P[7:0]
8-Bit MTIM1 Port B, D:
TMRCLK[n]
8-Bit MTIM2 Port B, D:
TMRCLK[n]
RGPIO
Port B:
RGPIO[15:8]
Port A:
RGPIO[7:0]
Internal Clock Source
REF CLK IRCLK
SPI1
Port A:
MOSI1 SS1
MISO1 SPSCK1
Clock Check
& Select
RESET
PTA0/RPGPIO0/
IRQ/CLKOUT
SIM
COP LVD IRQ
FLASH1
128/64 KB
FLASH2
128/64 KB
RAM
16/8 KB
SPI2
SPI3
Robust
Update
Manager
VREG
LCD[9:6]:
MOSI2 SS2
MISO2 SPSCK2
Port E, B:
MOSI3 SS3
MISO3 SPSCK3
LCD
Port C,E:
LCD[5:0]
Port D:
LCD[34:27]
Port F:
LCD[43:36]
SPI2:
LCD[9:6]
XOSC2 Port C:
EXTAL2
XTAL2
Port A0 or LCD25
CLKO
XOSC1
EXTAL1
XTAL1
Port A0 or LCD25
CLKO
Independent
RTC
PTA7/RGPIO7/TPMCLK/PRACMP1P2/AD13
PTA6/RGPIO6/TPMCH1/AD12
PTA5/RGPIO5/TPMCH0/AD11
PTA4/RGPIO4/SS1
PTA3/RGPIO3/SCLK1
PTA2/RGPIO2/MISO1/AD10
PTA1/RGPIO1/MOSI1
PTA0/RGPIO0/IRQ/CLKOUT
PTB7/RGPIO15/KBI1P5/TMRCLK2/AD15
PTB6/RGPIO14/KBI1P4/TMRCLK1/AD14
PTB5/RGPIO13/SDA/PRACMP2P3
PTB4/RGPIO12/SCL/PRACMP2P2
PTB3/RGPIO11/KBI1P3/PRACMP2P1/TX1
PTB2/RGPIO10/KBI1P2/PRACMP1P0/RX1
PTB1/RGPIO9/KBI1P1/SS3/TX2
PTB0/RGPIO8/KBI1P0/PRACMP2P0/RX2
PTC7/LCD4
PTC6/LCD3/PRACMP2P4
PTC5/LCD2/PRACMP1P4
PTC4/LCD1/PRACMP2O
PTC3/LCD0/PRACMP1O
BKGD/MS/PTC2
PTC1/KBI1P7/XTAL2/TX3
PTC0/KBI1P6/EXTAL2/RX3
PTD7/LCD34/KBI2P7
PTD6/LCD33/KBI2P6
PTD5/LCD32/KBI2P5/TMRCLK2
PTD4/LCD31/KBI2P4/TMRCLK1
PTD3/LCD30/KBI2P3
PTD2/LCD29/KBI2P2
PTD1/LCD28/KBI2P1
PTD0/LCD27/KBI2P0
PTE7/LCD5
PTE6/SS3/TX2
PTE5/SCLK3
PTE4/MISO3/MOSI3
PTE3/MOSI3/MISO3
PTE2/PRACMP1P1
PTE1/PRACMP1P3/AD9
PTE0/PRACMP1O/AD8
PTF7/LCD43/AD19
PTF6/LCD42/AD18
PTF5/LCD41/AD17
PTF4/LCD40/AD16
PTF3/LCD39/TX3
PTF2/LCD38/RX3
PTF1/LCD37/EXTRIG
PTF0/LCD36
DADP/M[3,0]
AD[7,4]
DADP/M[2:1]
AD[6:5]
The IRTC is in a separate
power domain, as is the
LCD controller.
VDD VSS1 VSS2
1 Pins with • are not present on 80-pin devices.
2 PRACMP1 has two less available inputs on the 80-pin devices.
EXTAL1 XTAL1 VBAT TAMPER
Figure 1. MCF51EM256 Series Block Diagram
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
5
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