MCP1318MT-46LE/OT 查看數據表（PDF） - Microchip Technology

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MCP1318MT-46LE/OT

Voltage Supervisor

Microchip Technology 

MCP131X/2X

VTRIPMAX VTRIPAC + VHYS

VTRIPMIN

VDD

1V

tRR

RST

VTRIP

tRST

tRPD

tRST

RST

VDD < 1V is outside the device operating specification. The RST (or RST) output state is

unknown while VDD < 1V.

FIGURE 1-1:

Device Voltage and Reset Pin Waveforms.

TABLE 1-1: DEVICE VOLTAGE AND RESET PIN TIMINGS

Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ

(only MCP1320, MCP1321 and MCP1322), TA = -40°C to +125°C.

Parameters

Sym Min Typ

Max Units

Conditions

Falling VDD Trip Point Detected

to RST or RST Active

VDD Rise Rate

Reset active time

(MR Rising Edge, POR/BOR

Inactive, or WDT time out) to

RST/RST Inactive

tRPD

—

650

—

tRR

Note 3

tRST

1.0

1.4

2.0

20

30

40

140

200

280

1120 1600 2240

μs VDD ramped from

VTRIPMAX + 250 mV down to

VTRIPMIN – 200 mV,

VDD falling @ 5 mV/μs,

CL = 50 pF (Note 1)

ms Note 2

ms Note 2

ms Standard Time Out

ms Note 2

RST Rise Time After RST Active

tRT

—

5

(Push-Pull Outputs only)

RST Rise Time After RST Inactive

(Push-Pull Outputs only)

—

5

RST Fall Time after RST Inactive

tFT

—

5

RST Fall Time after RST Active

—

5

—

μs

—

μs

—

μs

—

μs

Note 1: These parameters are for design guidance only and are not 100% tested.

For RST 10% to 90% of VDD,

CL = 50 pF (Note 1)

For RST 10% to 90% of VDD,

CL = 50 pF (Note 1)

For RST 90% to 10% of VDD,

CL = 50 pF (Note 1)

For RST 90% to 10% of VDD,

CL = 50 pF (Note 1)

2: Custom ordered Reset active time; minimum order volume requirement.

3: Designed to be independent of VDD rise rate. Device characterization was done with a rise rate as slow as

0.1 V/s (@ +25°C).

DS21985A-page 8

© 2005 Microchip Technology Inc.

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