MS81V04166 查看數據表（PDF） - Oki Electric Industry

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MS81V04166

Dual FIFO (262,214 Words ×8 Bits) × 2

Oki Electric Industry 

1Semiconductor

PEDS81V04166-01

MS81V04166

Read Cycle Timing (Output Enable): MODE1 = VCC/VSS

n cycle

n + 1 cycle

n + 2 cycle

n + 3 cycle

VIH

SRCK

tOENH

tODSH

tODSS

tOENS

VIL

OE1, 2

tWOEL

VIH

tDECK

VIL

DO

10-17/20-27

n–1

tWOEH

n

Hi-Z

VIH

n+3

VIL

VIH

RE1, 2

VIL

VIH

RSTR1, 2

VIL

17/19

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