PCA9538A 查看數據表（PDF） - NXP Semiconductors.

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PCA9538A

Low-voltage 8-bit I2C-bus I/O port with interrupt and reset

NXP Semiconductors. 

NXP Semiconductors

PCA9538A

Low-voltage 8-bit I2C-bus I/O port with interrupt and reset

Glitches in the power supply can also affect the power-on reset performance of this

device. The glitch width (tw(gl)VDD) and glitch height (VDD(gl)) are dependent on each

other. The bypass capacitance, source impedance, and device impedance are factors that

affect power-on reset performance. Figure 17 and Table 10 provide more information on

how to measure these specifications.

VDD

∆VDD(gl)

tw(gl)VDD

time

002aah331

Fig 17. Glitch width and glitch height

VPOR is critical to the power-on reset. VPOR is the voltage level at which the reset condition

is released and all the registers and the I2C-bus/SMBus state machine are initialized to

their default states. The value of VPOR differs based on the VDD being lowered to or from

0 V. Figure 18 and Table 10 provide more details on this specification.

VDD

VPOR (rising VDD)

VPOR (falling VDD)

time

POR

Fig 18. Power-on reset voltage (VPOR)

time

002aah332

PCA9538A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 28 September 2012

© NXP B.V. 2012. All rights reserved.

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