GS820V32Q 查看數據表（PDF） - Giga Semiconductor
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GS820V32Q Datasheet PDF : 15 Pages
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GSI TECHNOLOGY
GS820V32Q/T
4/5/6, 2.5V I/O, 2.0mA
64K x 32 Burst
Mode pin function
GS820V32Q/T
80-133MHz (P/L)
66MHz Flow-Thru
LBO
L
H or NC
Function
Linear Burst
Interleaved Burst
FT
L
H or NC
Power down control
ZZ
Function
L or NC
Active
H
Standby
IDD=ISB
Function
Flow-Thru
Pipeline
Note: There are pull up devices on LBO and FT pins and pull down device on ZZ pin, so those input pins can be unconnected and
the chip will operate in the default states as specified in the above tables.
Linear Burst sequence
Interleaved Burst sequence
A[1:0] A[1:0] A[1:0] A[1:0]
A[1:0] A[1:0] A[1:0] A[1:0]
1st address 00 01 10 11
1st address 00 01 10 11
2nd address 01 10 11 00
2nd address 01 00 11 10
3rd address 10 11 00 01
3rd address 10 11 00 01
4th address 11 00 01 10
4th address 11 10 01 00
The burst wrap around to initial state upon completion
The burst wrap around to initial state upon completion
Byte Write Function
Function
SGW BWE BW1 BW2 BW3 BW4
Read
HHXXXX
Read
H L HHHH
Write all bytes L X X X X X
Write all bytes H L L L L L
Write byte 1
HL LHHH
Write byte 2
H L H L HH
Write byte 3
H L HH L H
Write byte 4
H L HHH L
Note: H=logic high, L=logic low, NC= no connect
Rev. 9/09/97
3/15
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