RA8816 查看數據表（PDF） - RAIO
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RA8816 Datasheet PDF : 68 Pages
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Preliminary Version 1.6
RA8816
144x65 Character/Graphic LCD Driver
CS
INT
C86
BIT4
P/ S
means Register Cycle and “1” means Data Access Cycle.
This pin must keep NC for serial mode.
Chip Select
I This is a chip enable for RA8816.
This pin must keep NC for serial mode.
O
Interrupt Signal
This is an interrupt output for MPU. Active low。
MPU Select
I
C86 = 0 Î The MPU interface is 8080 series.
C86 = 1 Î The MPU interface is 6800 series(Default).
This pin must keep NC for serial mode.
Data Bit Select
I
BIT4 = 0Î The parallel mode is use 8-bit data bus.
BIT4 = 1Î The parallel mode is use 4-bit data bus(Default).
This pin must keep NC for serial mode.
Parallel/Serial Select
I
P/ S = 0 Î The MPU interface is serial mode(Default). See the setting of
DB[7..6].
P/ S = 1 Î The MPU interface is parallel mode.
4-2 Clock and Power
Pin Name
V0~V4
C1P, C1M
C2P, C2M
C3P
VLCD
VREF
VR
CLK_SEL
EXT_CLK
VDD
VDDP
GND
GNDP
Table 4-3
I/O
Description
Voltage Source of LCD Driver
O The relationship of the power is VLCD>V0≧V1≧V2≧V3≧V4≧VSS。
I
Capacitor Input
These are used to connect a capacitor for internal Booster.
I
Capacitor Input
These are used to connect a capacitor for internal Booster.
I
Capacitor Input
These are used to connect a capacitor for internal Booster.
O Booster Output
Reference Voltage Input
I This is the refeence voltage input when use an external regulator.
I
Voltage Adjustment
Applies voltage between V0 and VSS. Using a resistive divider.
Clock Select
I
This pin is used to select the clock source. When CLK_SEL is “1”, the
clock is generated by internal RC oscillator. When CLK_SEL is “0”, the
system clock is drived by external pin - EXT_CLK.
External Clock
I When CLK_SEL is “0”, this pin is the external clock input. When
CLK_SEL is “1”, this pin do not used and has to connect VDD or GND.
P VDD Power
P Ground
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